IRC logs for #openrisc Wednesday, 2012-12-12

yluo_hello all, i am new to openrisc. After days of trying, I am able to boot Linux on a DE2 (not DE2-115), but the boot procedure stopped at "Unpacking initramfs". Any hints will be greatly appreciated.18:37
yluo_btw, I followed the nice tutorial from
Erantyluo_: Are you sure there's  ramdisk in your kernel image?18:46
ErantNow mind you, you're further along than I am, there's something off about my attempts.18:47
yluo_in fact I am not sure about whether ramdisk is in my kernel image. how can I check it?18:55
ErantWell, for one, how large is your image?18:57
yluo_4759072 bytes19:00
ErantSounds about right. What are the bootargs? (I'm trying to debug here from a general knowledge of how this is supposed to work, not specific OpenRISC knowledge)19:03
yluo_thanks. this is what I have for bootarg --- console=uart,mmio,0x90000000,11520019:14
yluo_i agree that this is not really an OpenRISC issue, more on the linux side.19:14
yluo_I only have 8MB sdram on the DE2 board. could it be the issue?19:15
ErantEuh, yes. What target did you compile for?19:16
yluo_here is something from the boot messages: Memory: 4208k/8192k available (2053k kernel code, 3984k reserved, 300k data, 1416k init, 0k highmem)19:16
yluo_target is or32-linux19:17
ErantThough, really, it'd panic if it ran out of memory.19:17
ErantI meant more, what platform did you synthesize for?19:17
stekernnaw, I think it just hangs there19:18
stekernat least it does that in or1ksim the times I've had a too large image compared to the memory size defined there19:18
yluo_Erant, were you asking the FPGA part number? it is Cyclone II EP2C35F672C6 on DE219:20
yluo_does it mean that with only 8MB SDRAM,  DE2 is not able to boot a linux?19:21
Erantstekern: Would it block trying to wire down the memory?19:22
Erantyluo_: No, you just don't want to go the initramfs route. Do you have storage on the board? Like a SPI flash?19:22
yluo_I have 4Mbyte Flash Memory and SD card socket19:23
ErantYou can try booting off an SD card instead of using a ramdisk.19:24
yluo_that is a good idea. do you have any pointers that can help me start?19:25
ErantGoogle would be a good a place as any, really.19:26
yluo_haha, yes google.     Is u-boot helpful?19:26
ErantYou'll be wanting a bootloader, sure, you'll be modifying the boot-args a lot.19:27
ErantBut u-boot itself can't do anything about where Linux gets its root filesystem.19:28
ErantYou'll have to figure out where the SD blockdevice is (assuming there's a driver for it in your kernel), supply the 'root=' bootarg, tell Linux that there's no initial ramdisk through noinitrd, maybe hint at the root filesystem by telling it through rootfs=, etc. etc.19:30
yluo_so I can have the root fs in either on-board flash memory or SD card, right?19:31
yluo_I saw orpsoc defines a SD controller, is that what I need to look into first?19:31
ErantSure. as long as there's a blockdevice that represents it.19:34
yluo_something like /dev/sda , right? I prefer SD card over the on-board flash memory, as it is easier to update the root file system. Am I understanding this correctly?19:36
ErantYeah. And it can be many different things. /dev/mmc<blah> would probably be more common.19:37
ErantAgain, google is your friend.19:38
yluo_thanks for the direction. Since it becomes more of a linux problem than OpenRISC, I will not flood this channel any more. I just want to say thank you for your help, and thanks the OpenRISC community for such wonderful platform/tools.19:41
ErantI actually had an orpsoc related question. bootrom.S doesn't seem to do any init of the DRAM block, but then loads the flash image into RAM.20:07
ErantAre the DRAM blocks self-configuring?20:07
stekernErant: yes, all memory controllers currently present are  self-configuring21:02
ErantFair enough. That explains that at least. Was the openRISC modeled after any existing architecture?21:02
stekernnot really, but it keeps much reassemblence with DLX and MIPS21:03
ErantFair enough, I can write MIPS. I'm having weird issues where I can't seem to get any output from the core. Going to have to go write some assembly to figure it out (or, ya know, wire up a JTAG dongle)21:04
ErantOr ChipScope.21:05
stekernopenrisc assembly is pretty straight forward, if you know mips you'll pretty much be all set already21:07
ErantWhat about delay slots?21:08
yluo_i have question related to SD controller. I got this error when running quartus II analysis & synthesis: Can't infer register for "new_bw" at sd_bd.v(132). Any hints?23:08

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