IRC logs for #openrisc Friday, 2012-11-09

@juliusb_franck_: yeah that doesn't look good haha00:13
@juliusbthere must be something else going on00:13
_franck_yeah sure00:14
_franck_is there strange things in icarus sometimes ?00:14
@olofkoh yes :)00:21
_franck_however, most of the time the error comes from the guy in from of the keyboard ;)00:23
@olofkSad but true00:23
@olofkAnd I agree... that's a weird loop00:23
_franck_and one more time I went to my keyboard before thinking....weird loop because weird code :)00:28
_franck_no :) I'm not writing this kind of thing :)00:31
_franck_just an algorithm problem00:31
@olofkWoohoo!! Got ordb2a simulating in modelsim in orpsocv3 now. A dirty, dirty hack, but at least it passes a testcase :)01:05
@juliusbi'll buy you a beer tomorrow to celebrate01:06
_franck_openOCD working with sim !!!01:19
_franck_need to clean a bit, and see if I can optimize speed01:19
mor1kx[mor1kx] skristiansson pushed 1 new commit to master:
mor1kxmor1kx/master 95be361 Stefan Kristiansson: icache: Remove unused bypass logic...06:43
@stekernjuliusb: I took a look at your fetch rework, wouldn't that stuff make more sense if it'd be in mor1kx_decode?07:28
@stekernI understand your rational about putting in a non-generic module at this point though07:29
@stekernI'm of coursae speaking about the branch detection07:30
@stekernah, but that will of course not be exactly the same thing, since you decode the jumps straight from ibus_dat_i in the fetcher07:58
@juliusbstekern: yes, i've basically duplicated the logic10:30
@juliusbI was saying yesterday, this shouldn't be a big problem if we just unhook what might be causing that logic to be duplicated elsewhere.10:30
@juliusb_franck_: great to hear you got OpenOCD working with the Verilog10:31
@stekernjuliusb: yup, I've got that from what you said yesterday10:36
@stekernbut I was mostly thinking about making that stuff generic for espresso and cappuccino10:36
@stekernbut I'm inclined to move the branch detection to the decode stage, not all the way back to fetch10:37
@juliusbAh OK, yep.10:39
@stekernhooking up a lot of logic on ibus_dat_i sounds scary in the cappuccino case10:39
@juliusbSure, you can do that (put branch detection in the fetch) and any implementation which doesn't need or want it can leave the outputs hanging.10:40
@juliusbIt's a bit annoying that we basically need another full adder there10:40
@stekernin the decode, you mean?10:40
@stekernnp ;)10:40
@juliusbput branch detection in decode :)10:41
@juliusbit's too early here10:41
@juliusbi'm at work early, leaving early to go to Gothenburg10:41
@juliusband... FSCONS!10:41
@juliusbwe're the only guys presenting on the embedded track this year haha10:41
@juliusband, tbh, we don't have much of a show to put on10:41
@stekernI'm dead today, we had a floorball tournament followed by sauna, food and beer yesterday at work10:41
@juliusbI'm actually planning on getting a bit of work done this weekend with Olof10:41
@juliusbhaha, yeah, tough day in the office ;)10:42
@juliusbinnebandy right?10:42
@stekernI think the floorball was what hit me hardest10:42
@juliusbyeah that's a hard game10:42
@stekernyeah, or 'salibandy' or 'sähly' in finnish :)10:42
@juliusbI played it a couple of times at KTH in stockholm10:43
@stekernwe had 3 games times 30 min games, with no changes 10:44
@stekernand I think it was ~8 years since I played last...10:44
_franck_what do you think of initialize memories (like the register file) for simulation purpose ?10:48
@stekern_franck_: don't we do that?10:48
_franck_in order to remove those xxxxx while simulating10:49
_franck_I don't think so because I had the problem10:49
@stekernat least there is the possibility to load a program into the memory, but perhaps everything else is x10:49
_franck_there is more of these in the RTL, need to check. We could also fill memories with random numbers10:51
@stekernah, I misunderstood what you wrote, I thought you meant: initialise ram the same way as it's done for register file10:51
_franck_ok sorry10:51
@stekernbut when is that a problem, you shouldn't read the registers before you write them10:52
_franck_well, when you have openOCD dumping all registers....10:52
@stekern...they are expected to be all 'x' if nobody have written anything to them, no? ;)10:53
_franck_yes sure, but then you get the tdo line undefined, all red in gtkwave10:55
_franck_but yes that sould be x10:55
_franck_it is normal10:55
@stekernIMO, that's 'a good thing', I expect stuff that hasn't been initialized to be 'x'10:55
_franck_yes, it was just anoying in *my* case10:56
@stekernthat's why I'm pressing you to explain why it's a problem for you10:56
_franck_because I was debugging the jtag tap and the tdo line was all red but I'll double check why it was a problem :)10:58
_franck_it was late :) and I was too happy to get this openOCD works10:58
_franck_stekern: did you try Marek Czerski patch ?11:01
_franck_about debug problem11:01
@juliusb_franck_: you can just check if there's any X's in the Verilog with ===11:15
@juliusband if so, just convert to either 0 or a random value if you like11:15
@juliusbI had problems with that, too11:15
@juliusb(when doing VPI stuff)11:15
_franck_ah ok, you're right thanks11:16
@juliusb woah, it's like 700SEK a ticket to FSCONS!11:26
jeremybennettjuliusb: Some of these conferences are very expensive. That's more than the European Linux Conference11:27
jeremybennettStick to FOSDEM11:27
@juliusbWell, the early bird was 400SEK.11:27
@juliusbI thought FSCONS was free!11:27
jeremybennettAnd that's not very cheap11:28
@juliusbYes, unfortunate. Oh well.11:31
@stekern_franck_: no, sorry, haven't got around to that11:37
@stekernbut he wanted to have your patch applied before his?11:38
jonibowe've got an extra ticket to FSCONs here... if somebody needs it and can figure out how to get it to Gothenburg/transferred to them somehow, let me know11:39
joniboi don't even know if it's transferable...11:40
_franck_stekern: not sure, don't know11:43
@juliusbjonibo: hiya! and thanks a lot for the offer11:46
@juliusbjeremybennett: BTW, unfortunately a work thing will be on next Thursday and I won't be able to make it down to London for OSHUG11:47
@juliusbI am very interested in James Pallister's presentation, actually11:48
@juliusbmore so than Parallela :) I have no use for such high-powered parallelism11:48
@juliusbParallella even (too many l's!)11:48
@juliusbAnyway, I'll have to make sure I catch up with the presentation afterward, unless you can point me to some publication of what he'll present11:49
jeremybennettjuliusb: Too bad about next Thursday. We'll have the whole team in town. Did you notice it was a slightly later start.12:20
jeremybennettIt will all be published, and looks like James or I will be giving the talk at HiPEAC. If you want to organize a talk in Cambridge, I'm sure one of us could come and present.12:21
LoneTechwb jeremy13:08
@stekernyou killed him ;)13:11
@stekern..or his connectiono13:12
LoneTechnot my intent13:12
@stekernheh :)13:13
@juliusbintent is different from actions though13:21
@juliusbhi LoneTech13:21
LoneTechlooks like I'll be visiting London Dec 1-414:25
@juliusbLoneTech: that's great! What is going on there?15:06
LoneTechnot much, probably some photography, a few musicals and visiting a friend15:16
LoneTechdo feel free to alert me of other things I should know of15:16
@juliusbI'll certainly try to catch up for a beer one night15:31
LoneTechwe do intend to see "we will rock you"15:46
@juliusbah, musical theater isn't really my thing16:51
@juliusbbeer, however, is16:51
@juliusbso be in touch, let me know where you'll be etc, I'd be up for a beer, I know some good places16:52
@juliusbSo, you know what I reckon is a good thing? Checkers within blocks16:52
@juliusbso, I wrote one in the control block which controls the PPC/NPC in the mor1kxz16:52
@juliusbthe moron16:52
@juliusbjust checks program flow, so there's no stuff-ups or missed instructions and the like16:52
@juliusbenabled and disabled by a parameter16:53
@juliusbit'll $finish() whenever it detects something went wrong16:53
@juliusbI recko more blocks should have such a thing16:53
@juliusbbus arbiters, etc.16:53
@juliusbobviously not synthesisable, but of course there's ways of making things disappaer for synthesis so it's no biggie16:53
@juliusbbasically, like assertion statements, but a special little bit of the code which does it, which is possible in something like a HDL, right?16:54
@juliusbanyway, I reckon we should use more of that16:54
@juliusbit's a good thing16:54
@stekernjuliusb: point to a place in the code where you use it?17:08
@stekernmusicals are teh shit btw! ;) (so is beer, but not the crappy karjala and lapin kulta we were served yesterday)17:09
@juliusbI want to see the book of mormon17:09
@juliusbthat's the only one17:09
@juliusbI'm setting of for Sverige17:11
@juliusboff even17:11
@stekernI guess I was destroyed as a child, my mom worked at adolf fredrik and brought me to all of their "school play" musicals17:23
@stekernyeah, those kind of checks are good17:23
@juliusbI love how Ryan Air announce the flight as "Final Call" but they haven't even started boarding, in fact, the no one is even at the gate19:33
@juliusbolofk: how did you compile that presentation you sent me?19:37
@juliusbstekern: did you point olofk to some simplified way to put together beamer presentations recently?/19:41
@juliusbah, got it, it's an org-mode thing19:45
@juliusbjust loaded it in emacs, all sweet19:45
@stekernyeah, should be in the backlog ;)19:52
@juliusbflytime, byetime19:54
-!- olof_ is now known as OlofRISC20:55
OlofRISCHas Peter Gavin released any RTL for his CPU?21:13
OlofRISCAnd _franck_, do you have a name for the OpenOCD VPI stuff?21:14
OlofRISCWe want to show what everyone's doing in the project21:15
_franck_no, I don't have any name22:20

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