| juliusb | alright! finally got the pronto espresso working on the Nexys3 board | 01:37 |
|---|---|---|
| juliusb | i had modified the on-chip blockram controller and accidentally inferred latches :-/ | 01:38 |
| * juliusb should always read the synthesis report for such stupid mistakes in future | 01:38 | |
| nvmind | good morning (or whatever based on your actual position) :) | 10:30 |
| juliusb | nvmind: hi | 11:37 |
| LoneTech | hello | 12:58 |
| juliusb | LoneTech: Hiya | 13:02 |
| LoneTech | sorry about the inconclusive notes on the MAC stuff. | 13:04 |
| juliusb | ?? | 13:05 |
| LoneTech | bug 18: http://bugzilla.opencores.org/bugzilla4/show_bug.cgi?id=18 | 13:06 |
| LoneTech | fwiw, the way it was used is definitely not by the spec either (the truncation and shift both differ) | 13:10 |
| stekern | I think you have mentioned this before, but what was the problem with the MACHI reading? | 13:16 |
| LoneTech | there is only one way to do it, using SPR read, and that does not guarantee that the MAC has finished first | 13:17 |
| LoneTech | SPR read is also a privileged operation | 13:17 |
| stekern | ah, yes. that was the problem | 13:17 |
| LoneTech | of course, the truncation also made machi nigh useless | 13:17 |
| stekern | true | 13:23 |
| stekern | LoneTech: did you notice this thread touching the same subject btw? http://lists.openrisc.net/pipermail/openrisc/2012-September/001328.html | 13:25 |
| LoneTech | only a few days ago, sorry | 13:25 |
| LoneTech | I seem to have a draft mail I never sent (probably unfinished) | 13:26 |
| stekern | heh ;) | 13:26 |
| LoneTech | not much to it; noted that divmod could also use dual reg write, that the pipeline forwarding wouldn't like that much, that the truncation is a weird mode | 13:27 |
| LoneTech | I guess it could be used in special cases analogous to the carry flag in bresenham line drawing | 13:28 |
| LoneTech | btw, I took a look at patchwork but it is rather tedious to set it up; not sure anyone has packaged it | 13:29 |
| stekern | I'm testing the openrisc support jia upstreamed to qemu now | 15:21 |
| stekern | seems pretty stable | 15:22 |
| stekern | much seems to be hardcoded (like clock frequency and such) though | 15:23 |
| stekern | I'm particularly interested in getting some fast(er) emulation going on, to be able to natively compile stuff in the emulator at reasonable speed | 15:25 |
| juliusb | stekern: are you talking about the Linux userspace emulation qemu can do? | 15:46 |
| stekern | juliusb: hmm, not sure what you mean.. | 17:00 |
| stekern | I was speaking about running the kernel in qemu, cross-compile gcc for or1k and build applications in Linux in qemu | 17:02 |
| stekern | I know that arm has some scratchbox+qemu setup, but not anything about how that setup actually works | 17:03 |
| juliusb | stekern: it's odd with the multiply - on the threestage, we don't appear to check for signedness, but it just *works* | 20:49 |
| juliusb | so... i'm a bit confused hehe | 20:49 |
| juliusb | in simulation, maybe i can understand | 20:50 |
| juliusb | haven't tried it on the board, though | 20:50 |
| juliusb | but i have verilator running through 20000 tests of random input | 20:50 |
| juliusb | and it all passes | 20:50 |
| juliusb | with the threestage, whether I do the sign correction for l.mulu or not | 20:50 |
| olofk | Goodbye openrisc. I will miss you | 22:43 |
Generated by irclog2html.py 2.15.2 by Marius Gedminas - find it at mg.pov.lt!