IRC logs for #openrisc Monday, 2017-07-24

--- Log opened Mon Jul 24 00:00:28 2017
psychotropeI'm have used FuseSoC to build openrRISC for the DEo-nano without errors.  Every guide online talks about attaching a USB to serial converter to read the serial output of Linux once it is loaded to the DE0-nano, where is the port on the FPGA design?  I've looked everywhere online and can't find conclusive information.  Help much appreciated :D00:17
psychotropeso people say on the bottom of the board (pins 5 and 6) others say to attach it to the side of the board as such:*IHSqP3iJ4SSYrAWk7ba3cg.jpeg00:19
psychotropeis anyone online?00:38
psychotropeI ran make program from within the de0-nano directory of the tutorials folder00:38
psychotropeand it says quartus_pgm is not in me $PATH00:38
psychotropeexcept it is00:38
psychotropebecause I can tab autocomplete quartus_pgm00:39
psychotropeand run it anywhere in my system00:39
psychotropestekern: I'm just messaging people hoping someone can help01:38
psychotropeI don't know anyone else here that I've talked to recently01:38
imphilpsychotrope, look at the constraint files you used when building the design02:02
psychotropeimphil: uh I have absolutely no idea what those are02:03
imphilthat should give you the fpga pins, and you can then use the de nano user manual (or other board documentation) to find the pin on the board this references to02:03
psychotropeI'm strictingly following the instructions in the tutorials folder02:03
imphilthen it's time to do some googeling now02:03
psychotropeI found the pinouts from the ORCON2013 guide02:04
psychotropeI'm trying to get "make program" to work but fusesoc is quitting with an unknown error now02:04
psychotropeI installed everything on the tutorials page02:05
psychotropePATH seems to be working now too02:05
imphilas I said, look at the constraint file that you used during synthesis. nothing else will give you definite answer02:05
psychotropewhere would I find that file?02:06
psychotropeI have the pinout sheet that came with the board02:06
psychotropebut its all GPIOs (ofc)02:06
psychotropeI'm using build-sw (fuseSoC) so most of the synthesis is abstracted away from my view02:06
imphilthe uart - usb adapter will be attached to gpip pins02:06
psychotropeI know02:06
imphiljust run a find in your source directory for a qsf or sdc file02:07
imphilthat's the constraints02:07
imphiland please have a rough look at the source code. it helps understanding what's in there at least02:08
psychotropeI'm just trying to get started with everything here and get through the tutorials first02:08
psychotropeFPGAs are unknown territory for me for the most part02:09
psychotropeI haven't gotten past writing a half-adder in verilog in terms of actual FPGA dev work02:09
--- Log closed Tue Jul 25 00:00:29 2017

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