| --- Log opened Mon Jul 24 00:00:28 2017 | ||
| psychotrope | I'm have used FuseSoC to build openrRISC for the DEo-nano without errors. Every guide online talks about attaching a USB to serial converter to read the serial output of Linux once it is loaded to the DE0-nano, where is the port on the FPGA design? I've looked everywhere online and can't find conclusive information. Help much appreciated :D | 00:17 |
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| psychotrope | so people say on the bottom of the board (pins 5 and 6) others say to attach it to the side of the board as such: https://cdn-images-1.medium.com/max/800/1*IHSqP3iJ4SSYrAWk7ba3cg.jpeg | 00:19 |
| psychotrope | is anyone online? | 00:38 |
| psychotrope | I ran make program from within the de0-nano directory of the tutorials folder | 00:38 |
| psychotrope | and it says quartus_pgm is not in me $PATH | 00:38 |
| psychotrope | except it is | 00:38 |
| psychotrope | because I can tab autocomplete quartus_pgm | 00:39 |
| psychotrope | and run it anywhere in my system | 00:39 |
| psychotrope | stekern: I'm just messaging people hoping someone can help | 01:38 |
| psychotrope | I don't know anyone else here that I've talked to recently | 01:38 |
| imphil | psychotrope, look at the constraint files you used when building the design | 02:02 |
| psychotrope | imphil: uh I have absolutely no idea what those are | 02:03 |
| imphil | that should give you the fpga pins, and you can then use the de nano user manual (or other board documentation) to find the pin on the board this references to | 02:03 |
| psychotrope | I'm strictingly following the instructions in the tutorials folder | 02:03 |
| imphil | then it's time to do some googeling now | 02:03 |
| psychotrope | I found the pinouts from the ORCON2013 guide | 02:04 |
| psychotrope | I'm trying to get "make program" to work but fusesoc is quitting with an unknown error now | 02:04 |
| psychotrope | I installed everything on the tutorials page | 02:05 |
| psychotrope | PATH seems to be working now too | 02:05 |
| imphil | as I said, look at the constraint file that you used during synthesis. nothing else will give you definite answer | 02:05 |
| psychotrope | where would I find that file? | 02:06 |
| psychotrope | I have the pinout sheet that came with the board | 02:06 |
| psychotrope | but its all GPIOs (ofc) | 02:06 |
| psychotrope | I'm using build-sw (fuseSoC) so most of the synthesis is abstracted away from my view | 02:06 |
| imphil | the uart - usb adapter will be attached to gpip pins | 02:06 |
| psychotrope | I know | 02:06 |
| imphil | just run a find in your source directory for a qsf or sdc file | 02:07 |
| imphil | that's the constraints | 02:07 |
| psychotrope | thanks | 02:07 |
| imphil | and please have a rough look at the source code. it helps understanding what's in there at least | 02:08 |
| psychotrope | I'm just trying to get started with everything here and get through the tutorials first | 02:08 |
| psychotrope | FPGAs are unknown territory for me for the most part | 02:09 |
| psychotrope | I haven't gotten past writing a half-adder in verilog in terms of actual FPGA dev work | 02:09 |
| --- Log closed Tue Jul 25 00:00:29 2017 | ||
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