--- Log opened Sun Apr 09 00:00:21 2017 | ||
mithro | shorne_: How does the MMU and the memory mapped IO stuff interact? | 00:46 |
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_franck_ | shorne_: I was pretty sure single stepping worked before | 01:44 |
_franck_ | shorne_: http://www.juliusbaxter.net/openrisc-irc/%23openrisc.2014-12-20.log.html | 01:45 |
mithro | I've broken my gdb in some way | 01:54 |
mithro | (Or maybe my QEMU) it seems to think my execution point is always the starting address... | 01:54 |
mithro | Gah | 02:06 |
mithro | I was running gdb instead of or1k-elf-gdb :-( | 02:06 |
_franck_ | shorne_: breakpoint->type is set in gdb_breakpoint_watchpoint_packet. My be we should move debug_reg_list[OR1K_DEBUG_REG_DSR] |= OR1K_DSR_TE to or1k_add_breakpoint. And, in or1k_remove_breakpoint, if there is no breakpoint anymore, deassert OR1K_DSR_TE. | 02:07 |
mithro | Does anyone have a gdb script to dump the itlb/dtlb? | 02:15 |
mithro | Any idea why "l.lbz r7,4(r6)" is causing two data loads? One for addr r6+4 and one for just addr 4 | 03:16 |
mithro | Oh | 03:27 |
mithro | The temporary stores are in an area which doesn't have anything backing it... | 03:27 |
mithro | Which means you read zero... | 03:27 |
psychotr1pe | is there an assemly quick guide of sorts for the OR1200 or mor1kx? | 04:19 |
mithro | I've been using the full guide at file:///usr/local/google/home/tansell/Downloads/openrisc-arch-1.1-rev0.pdf | 04:56 |
shorne_ | _franck_: maybe it only worked after hitting a breakpoint? | 05:23 |
shorne_ | _franck_: I posted this patch for the fix.. http://openocd.zylin.com/#/c/4094/ | 05:24 |
shorne_ | mithro: not sure how different the mmu ops are between actual memory and io | 05:26 |
shorne_ | I dont really like reading the patches on gerrit, another place i put the openocd patches is here: https://github.com/stffrdhrn/openocd/commit/6312596cd73c2b7b8a8949a9de814098f8fdf77f | 05:29 |
shorne_ | mithro: yeah, we store the state during exceptions into temp memory arround 0-0x100 | 05:47 |
mithro | shorne_: Yeah - I've hacked around it for now | 05:47 |
shorne_ | There is a patch to move it to shadow registers (I am planning for next qemu and linux patches) | 05:47 |
shorne_ | if you are interested: | 05:48 |
shorne_ | qemu: https://github.com/stffrdhrn/qemu/commit/8fab22f7dc93116c0d5283a7cab3a202c00b2f61 - implement the shadow registers (just a hack for now) | 05:50 |
shorne_ | linux: https://github.com/stffrdhrn/linux/commit/19b1237da5efd7333c30ffaeb063b964d63aea6d - use shadow regsiters for exceptions | 05:51 |
shorne_ | but... I am not sure I will make next kernel merge window | 05:51 |
shorne_ | mithro: do you think you would want to cleanup and post your "relocatable physical memory" kernel patches when done? | 05:52 |
mithro | shorne_: Most definitely | 05:52 |
shorne_ | I think it would be good to have | 05:52 |
mithro | No timeline though | 05:53 |
mithro | This code seems to have optimised away call_console_drivers | 06:02 |
mithro | well, I'm getting pretty far now | 06:08 |
mithro | http://paste.debian.net/926689/ | 06:08 |
mithro | bblr | 06:08 |
mithro | shorne_: we would like to get drivers and everything upstream | 06:14 |
mithro | shorne_: So - I was wondering about that comment in the page table miss stuff | 07:36 |
mithro | shorne_: I'm using this approach -> | 07:40 |
mithro | shorne_: https://github.com/mithro/HDMI2USB-misoc-linux/blob/edd416193fe9992cb9a512f325bc1e49f6aa673e/arch/openrisc/kernel/head.S#L573-L589 | 07:40 |
mithro | shorne_: I basically jump to the virtual space at the same time as enabling the mmus which means we only have to deal with virtual space | 07:40 |
mithro | Yay - lx-dmesg works now... | 08:16 |
shorne_ | mithro: I see, is _after_enable_mmu actually in virtual space? | 10:12 |
shorne_ | it looks like not, but it could be | 10:13 |
mithro | Yes | 10:13 |
mithro | The j is going to virtual space | 10:13 |
shorne_ | wouldn't _after_enable_mmu: be something like 0x00002xxx? | 10:15 |
mithro | shorne_: it's 0xc0002xxx | 10:17 |
shorne_ | oh, I see | 10:19 |
-!- shorne_ is now known as shorne | 10:19 | |
mithro | I'm just stepping through the kernel setting up it's real page table now | 10:22 |
shorne | that will work well then | 10:22 |
mithro | Got all the way to uart init before discovering that I was still using the boot handlers | 10:22 |
shorne | yeah, they get replaced | 10:23 |
mithro | Is there a way to make qemu just halt on a bad memory read/write location rather then segfault/stop | 10:23 |
shorne | I haven't worked on that code at all really. But I figure once you are in virtual address space most of the stuff will work fine a lot is not arch specific | 10:23 |
shorne | I dont know, maybe use a conditional watchpoint? | 10:24 |
shorne | I dont know if its possible, but something like address >0cfffffff | 10:24 |
shorne | you can do masks on watchpoints, if you know generally where it might cause access | 10:26 |
mithro | https://www.irccloud.com/pastebin/YH3B8Rkj/ | 10:26 |
shorne | oh, making lots of progress | 10:27 |
shorne | Got to go to bed now, early morning | 10:28 |
mithro | Have a good night | 10:29 |
mithro | Trying to figure out this self modifying code at the moment | 10:30 |
mithro | https://github.com/mithro/HDMI2USB-misoc-linux/blob/edd416193fe9992cb9a512f325bc1e49f6aa673e/arch/openrisc/mm/init.c#L164-L184 | 10:32 |
mithro | The trick is that l.j is opcode zero | 10:44 |
mithro | Something is broken in the page tables | 11:31 |
_franck_ | J ##asm-fr | 16:40 |
mithro | shorne: any tips for debugging the page tables? It appears they are getting a virtual address when they should be getting a physical one. | 20:47 |
mithro | I'm pretty sure the issue is in the initial page tables setup which is mapping the ram | 20:48 |
mithro | But I could be wrong | 20:48 |
--- Log closed Mon Apr 10 00:00:23 2017 |
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