IRC logs for #openrisc Wednesday, 2016-08-17

--- Log opened Wed Aug 17 00:00:29 2016
wallentoshorne: I think we were waiting for bluecmd and stekern to object01:48
wallentoshould merge now01:49
shornewallento: thanks03:40
wallentoI have added shorne to the GNU toolchain group on github03:45
wallento^ stekern, blueCmd, olofk_, jeremybennett03:46
stekernwallento: fine by me04:06
ZipCPUCan I get a survey of clocking speeds folks run OpenRISC at?  I've heard numbers of 200MHz and 50MHz so far, but I'd be curious to hear what everybody is actually using ...18:29
olofkZipCPU: I'm usually running between 50-70. Depends mostly on the oscillator on the particular board I'm using18:31
ZipCPUYou don't run PLL's to set the frequency to whatever you want?18:32
olofkZipCPU: Well, yes, but these frequencies are usually easily created by the pll from the oscillator18:33
olofkFor low-end FPGAs I think you need to disable features when you start to reach 100MHz18:34
ZipCPUI found on line that OpenRISC runs at 200MHz.  Do you know of anyone running it that fast?18:34
olofkAnd raw speed isn't usually the priority18:34
olofkI built mor1kx for a Virtex-6 a few years ago and got it up to 200MHz when disabling a lot of things like caches and MMU18:35
olofkNever run it though18:35
ZipCPUReally?  You would disable a cache line to get higher speed, rather than suffer a stall when accessing the cache?18:36
olofkstekern or wallento would be your best shot at finding usable high frequencies18:36
olofkDepends on the application. If you're doing number crunching, or need to quickly communicate with a peripheral, the raw speed can be an advantage18:37
ZipCPUstekern, wallento: Any comments on high frequency?  What speed do you tend to run OpenRISC at?18:37
ZipCPUWhat other priorities do you find yourself responding to?18:38
olofkBut on the other hand, I think stekern got the best benchmarking result running at a lower speed, but with caches and the store buffer enabled18:38
olofkIf you're running Linux you need the MMU enabled, and caches are probably a good idea18:40
olofkBut you might not need fast division and so on18:40
ZipCPUDivision would slow the CPU down?18:41
ZipCPUThat is, slow the clock down, rather than just stalling the CPU?18:41
olofkFast division is often on the critical path. A serial one isn't affected so much18:46
ZipCPUI have a chart I intend to show at ORCONF showing how division impacts a ZipCPUs area, just ... not it's speed.18:46
olofkBut honestly, I have spent very little time doing CPU design compared to many people in here :)18:46
olofkGot to go18:47
olofkGood night18:47
ZipCPURgr.  Thanks for the quick answer.18:47
ZipCPUstekern, wallento?  Your thoughts?18:47
stekernZipCPU: I got around 100MHz on low-end FPGAs when disabling MMU. Around 80MHz with MMU.23:27
stekernI never disabled any caches23:27
stekernbecause, if you disable icache you at least decrase the ipc by half, and you don't gain a 2x freq increase by doing so23:28
--- Log closed Thu Aug 18 00:00:30 2016

Generated by 2.15.2 by Marius Gedminas - find it at!