IRC logs for #openrisc Wednesday, 2016-07-27

--- Log opened Wed Jul 27 00:00:57 2016
stekernZipCPU: I'd put the caches in the "bump" in your approach02:31
stekern... and I'd have a "bump" on both the ibus and the dbus (if that's what the "two implementations" meant)02:32
ssvbolofk, poke53281: I have updated the https://pixman.miraheze.org/wiki/OpenRISC_Support#Known_problems section to also list jor1k10:53
ssvbregarding the toolchain in general, is there a good reason why or1k-elf and or1k-linux-musl use different branches in the https://github.com/openrisc/or1k-gcc repository?10:54
ssvbthe malloc problem is only reproducible in qemu but not in jor1k, so it probably makes sense to debug qemu and try to fix it10:56
Findehttps://www.reddit.com/r/Android/comments/4uuiuf/why_is_the_proprietary_arm64_preferred_to_the/11:34
Findelol11:34
kc5tjaMorning.  Just waiting for my morning meeting before heading into work.12:07
ZipCPUThis was a surprise: I got a certificate expired notice for https://www.opencores.org:443, yet later had complete success with https://opencores.org:443.16:21
ZipCPUSupposedly, th certificate for the first was for "*.opencores.org", yet it expired Aug 25, 2013.16:21
olofkssvb: Thanks for the update. Don't have a clue about the different branches16:59
ssvbolofk: ok, I'll just try to test if the musl branch also works for or1k-elf17:10
ssvbfrom the practical point of view, I'm most interested in the 'microcontroller' variant of OpenRISC because it is used in Allwinner SoCs17:11
olofkstekern: You know the history of these branches?17:12
olofkThe musl tags seem to be a bit older17:14
--- Log closed Thu Jul 28 00:00:59 2016

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