IRC logs for #openrisc Monday, 2016-07-18

--- Log opened Mon Jul 18 00:00:44 2016
mafmolofk: do you remember where the chinese guy with the poster was coming from?15:23
mafmin the risc-v conf, I mean15:23
mafmalso, probably you know if there's some component that can be readily used to drive video, even if not very fast?  (custom accelerators, perhaps?)15:24
olofkmafm: Hi! Great to meet you at the conference.15:27
olofkDon't remember which one you mean. I spent most of the time at the poster session at my own poster, so I'm afraid I didn't even see all the posters15:28
olofkBut if you're just looking for a simple frame buffer core, we usually use the vga_lcd core in most of the OpenRISC-based systems15:29
olofkIt has a Linux driver, but it doesn't do any acceleration other than using DMA15:29
mafmolofk: same :-)15:40
mafmolofk: I was just wondering what kind of GPU lowRISC, Shakti or SiFive are going to use15:41
olofkLowRISC just recently decided to add video output. They are having some interns writing one from scratch now if I understood it correctly15:49
olofkI would assume that SiFive writes one from scratch too. They don't seem very keen on reusing code15:49
olofkFor shakti I have no idea unfortunately. They did a presentation at orconf last year. Maybe there is some info there. It should be on youtube if you have some time and popcorn :)15:50
mafmolofk: I was wondering if somebody would be reusing one of the GPUs like Mali15:51
mafmprobably not lowRISC or SiFive though15:51
olofkI would guess it costs insane amounts of money to license something like Mali15:54
olofkBut I think that LowRISC has been looking at miaow or nyuzi too actually16:08
olofkNyuzi is already packaged for FuseSoC :)16:09
mafmolofk: I guessed that something was available from FuseSoC, that's why I asked you :-)16:18
olofkNyuzi is pretty cool. He got a demo where he renders quake levels on his blog
olofkAm I the only one who find it annoying that blogspot localises the URLs?16:28
* mafm finds that annoying, too16:33
mafmolofk: I am trying to convince the guy from eoma68 (do you know him?) about trying to use RISC-V in the future16:34
olofkAh.. yeah.. I have read about eoma68 before, but haven16:35
olofk't seen anything about it for a while16:35
olofkIs the CPU arch standardized too? I thought it was just the pinout16:37
olofkAh cool. It runs a Softbank Cortex A7?16:43
olofkI like the idea, but a looooot of technical challenges16:44
mafmolofk: allwinner a20, I think16:48
mripardthe later Allwinner SoCs would probably have more appeal for this channel :)16:54
mafmthe point of the eoma68 is more the standard interfaces, SoCs are swappable (if produced later)16:57
olofkmripard: Are those the one with the built-in OpenRISC?16:58
olofkmafm: Ah ok. I misunderstood you a bit then. I thought you wanted to have RISC-V specified in the eoma68 standard, but what you're looking for is to have a RISC-V-based SoC in the LibreTea device17:00
mafmactually, a compatible CPU-card could contain openrisc at its main core :D17:01
mafmolofk: there are people talking about using other cpu-cards with mips, or ICubeCorp (unknown to me), and I was pushing to have RISC-V into account17:02
mripardolofk: indeed17:02
mripardall the new ones comes with an openrisc core in addition to the arm ones17:03
mripardwith access to all the devices in the SoC17:03
olofkmripard: I know that stekern did some research on this a while ago. I only remember that they were doing some weird endian swapping and faking the address space a bit. It's used for power management or something, right?17:06
olofkmafm: Yes, that would be cool. Problem is that there isn't any usable RISC-V silicon yet :/17:07
olofkWould be awesome to have LowRISC there17:07
olofkSo it still makes a lot more sense to just use a cheap Softbank SoC.17:08
mafmolofk: you say Softbank because they just bought ARM (I heard it vaguely on the radio)?17:12
olofkYeah. I'm trying to keep up with the times17:13
mafmolofk: according to , I had some hopes that it could be put in silicon ("The resulting customized U500 SoC is optimized  for  manufacture  in  a  TSMC  28nm  metal-gate  process,  and  delivered  as  packaged  tested  parts by SiFive.")17:13
mafmI had never heard of softbank before17:13
olofkMe neither17:13
olofkIt would be awesome if SiFive produced that one, but I haven't understood if they will just build it, or if they are waiting for a customer to actually want it first17:14
mafmI think that they mentioned the possibility of a kickstarter, but if somebody else wants to buy, they would probably be fine with it :D17:17
olofkYeah. A kickstarter might be worth a shot, depending on how much money they need, and what they can make for it17:20
olofkThey will probably run in to some of the same challenges that LowRISC has had. Hope to see both succeeding, and that they help each other17:21
olofkI know they do have a lot of collaboration already17:21
olofkI said it before, but the CPU is only one of the cores on a chip, and not necessarily the most complex one either. In my opinion there is far too much focus on the CPU compared to anything else17:22
olofkExcept for buses of course. There seem to be a ton of NoCs and other interconnects right now17:23
LaksenI've never really seen any real bus interconnects anywhere17:25
olofkOh god17:31
LaksenDid I miss something?17:32
olofkWishbone, AXI4, AHB, TileLink, HopLite, TileLink, LISNoC17:36
olofkOk, perhaps I didn't have to mention TileLink twice :)17:37
olofkThat's probably an indication that I should get to sleep now17:38
kc5tjaStill a fan of Wishbone overall.18:55
--- Log closed Tue Jul 19 00:00:45 2016

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