IRC logs for #openrisc Sunday, 2016-05-22

--- Log opened Sun May 22 00:00:17 2016
shorneok, I had some time to compare gcc and gdb.  I figured out how to read the stuff calling convention in gcc.  What I figured out by reverse engineering the assembly is pretty close to gcc.03:52
shorneThe one was was worried about is why vecrod are handled strange, but it seems to be how vector mode defined in gcc. gcc/stor-layout.c in vector_type_mode()03:54
shorneIt seems openrisc actually falls back to some gcc default behavior for returning structures and vectors.03:55
shornedefinned gcc/targhooks.c : default_return_in_memory03:56
shorneI posted the latest changes to my git pull request.
shornewill look into other failures04:14
SMDhomeTrying fusesoc with verilator and getting errors like: verilator/tb.cpp:89:29: error: ‘class Vorpsoc_top’ has no member named ‘v’08:29
SMDhomeHas anyone seen that before?08:49
shorneSMDhome: no, but I replied to your PM from SMDnote, let me know if you see it, you can ask any followup questions on gdb in the room if you want08:52
SMDhomeSeems like dhrystone hangs on current mor1kx Oo11:18
SMDhomeSeems there is a bug in mor1kx .____.12:54
olofk_SMDhome: Are you running mor1kx-generic under verilator?13:31
olofk_When you get the " error: ‘class Vorpsoc_top’ has no13:31
olofk_                 member named ‘v’" errors13:31
SMDhomeolofk_: nope, I tried verilator and got that error with no "v" in class13:31
-!- olofk_ is now known as olofk13:31
olofkSMDhome: But which system did you run?13:31
SMDhomeI guess I run iverilog sim instead. Mor1kx-general13:32
olofkYou mean mor1kx-generic ?13:32
SMDhomeyep. sorry13:32
SMDhomeI don't know for sure, but flag in "x" state seems wrong13:32
SMDhomeAlso I'd like to run verilated version13:33
olofkSMDhome: How did you run it? "fusesoc sim --sim=verilator mor1kx-generic --elf-load /path/to/elffile" ?13:34
SMDhomeverilator is built from latest sources13:35
SMDhomeolofk: can I get .vcd with fusesoc?13:49
olofkSMDhome: It's usually with --vcd13:50
SMDhomethanks, I'll try to debug dhrystone thing but it would be nice if someone could try to reproduce it13:51
olofkBut only if the system has implemented vcd dumping, which most systems in the standard library does13:51
olofkSMDhome: I'll give it a shot when I get the time13:51
SMDhomeI think there is a problem with rf and pipeline itself, I'll update ticket with .vcd file14:23
SMDhomeUpdated ticket14:35
SMDhomemor1lx_lsu_cappuchino:327 line, i got {1, 10} at switchcase and then fail to default. Is that planned or not?14:48
SMDhomesomething's wrong while bypassing results imho, but I need someone to confirm that. I'll continue tomorrow15:08
olofkSMDhome: I can't reproduce the verilator problems you are seeing16:04
olofkI'm updating my verilator installation to latest git head just to make sure16:05
olofkSMDhome: If you see undefined signals in the VCD, you could try to set OPTION_RF_CLEAR_ON_INIT=1 on mor1kx. That sets the initial register values to 0 instead of being undefined16:09
SMDhomeolofk: they're defined, but something's wrong with results bypassing16:11
SMDhomeS 00006e24: 84a40000 l.lwz   r5,0x0000(r4)   r5         = 000178ec  flag: 116:11
SMDhomeS 00006e28: a842feff l.ori   r2,r2,0xfeff    r2         = fefefeff  flag: 116:11
SMDhomeS 00006e2c: e0c51000 l.add   r6,r5,r2        r6         = xxxxxxxx  flag: 116:11
SMDhomeS 00006e30: aca5ffff l.xori  r5,r5,0xffff    r5         = b1b8ffxx  flag: 116:11
olofkSMDhome: Yep. With latest verilator I get the same errors as you got16:12
olofkNeed to find out what changed and see if I can make it compatible with old and new versions16:12
olofk2Stupid internet connection17:09
olofk2SMDhome: I fixed the verilator issues17:09
olofk2Edit ~/.local/share/orpsoc-cores/systems/mor1kx-generic/bench/verilator/tb.cpp and replace all "top->v->" with "top->orpsoc_top->"17:11
olofk2Not sure if this works for older versions though, so I don't want to check in the changes17:13
olofk2Anyone with a slightly older verilator who could check this?17:15
olofk2Slighly older probably means 3.882 or older17:17
SMDhomeolofk: thanks, it works now, even with dhrystone bin, but afaik iverilog sim is more precise23:19
--- Log closed Mon May 23 00:00:19 2016

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