IRC logs for #openrisc Monday, 2015-10-19

--- Log opened Mon Oct 19 00:00:32 2015
-!- LoneTech_ is now known as LoneTech08:44
promachHi, andrzejr. Thanks for your help. here you go: http://dpaste.com/3TSQ0BT13:26
* promach slaps promach around a bit with a large fishbot14:10
-!- simoncoo1 is now known as simoncook15:53
GeneralStupidolofk:16:17
GeneralStupidolofk: sorry :)16:17
olofkpromach: If I understood things correctly, you compiled your testcase with musl. That will unfortunately not work16:22
olofkYou must use newlib (or1k-elf-) there instead16:23
olofkoh... I saw your dpaste now. Looks like it worked out for you. Great :)16:23
promachSo, it is better to use mor1kx than or1200  ?16:26
olofkIn general yes16:26
olofkAnd I noticed that or1200-generic doesn't seem to run the testcase. Got the same issue here16:26
olofkNot many people use or1200-generic, so I'm afraid it looks like it has broken16:27
olofkI'll take a look at it when I get the time, but if you can stick to using mor1kx, that's the recommended way16:27
GeneralStupidolofk: then i have to update my de2 port - the de1 port uses or1200...16:37
GeneralStupidolofk: i think there is something wrong with my tooling... how can i test that16:37
olofkGeneralStupid: Oh.. I hadn't seen that. de1 can use both but it seems like default is or1200.16:45
GeneralStupidolofk: i will change that in "my" port16:46
olofkGeneralStupid: Cool16:53
GeneralStupidolofk:  i finish my work in 2 weeks16:55
GeneralStupid59 hours to go :)16:55
GeneralStupid:/ = openocd: driver.c:191: interface_jtag_add_dr_scan: Assertion `field == out_fields + scan->num_fields' failed.17:37
olofkHmm.. the problem with the or1200-generic system is that we're getting an illegal instruction exception. Looks like either slli or srli18:24
olofkBut neither of them are optional, right?18:26
olofkor is it the the mtspr/mfspr? Do they cause illegal instruction exception if the spr is not there?18:34
olofkaha. They need to have OR1200_IMPL_ALU_ROTATE defined18:39
_franck_GeneralStupid: how do you get such error ?18:41
GeneralStupid_franck_: i try to flash via telnet and the reset gives me this error, the core reboots then18:42
_franck_by reset you mean hardware reset ?18:44
GeneralStupid_franck_: YES18:45
olofkOk, so now or1200-generic prints out hello world again18:48
olofkBut why doesn't it exit? It just loops in _or1k_board_exit. Is l.nop 0xc supposed to break the sim?18:48
olofkWhere are the nop-codes defined?18:48
_franck_olofk: last time I search this information I had a hard time ;)18:50
_franck_olofk: https://github.com/openrisc/or1ksim/blob/63f04c79589c1e8ef682bfa51a38853e3ce1bf1a/cpu/or1k/spr-defs.h#L62718:52
GeneralStupidbut it looks like it comes back up with openocd18:52
_franck_GeneralStupid: is the transfer complete before you reset ?18:53
olofk_franck_: I wrote them down long ago on the opencores wiki, but it turns out 0xc wasn't in that list. According to mor1kx_monitor, it's "Silent exit"18:53
olofkAnd looks like it's the same in or1kxim. Is this a "new" thing?18:54
GeneralStupid> halt; load_image /home/pe/projects/openrisc/source_files/main.elf; reg npc 0x10018:55
GeneralStupid71988 bytes written at address 0x0000000018:55
GeneralStupid3384 bytes written at address 0x0001200018:55
GeneralStupiddownloaded 75372 bytes in 0.206059s (357.206 KiB/s)18:55
GeneralStupidnpc (/32): 0x0000010018:55
_franck_olofk: yes, it's a new feature: https://github.com/openrisc/or1ksim/commit/63f04c79589c1e8ef682bfa51a38853e3ce1bf1a18:55
_franck_it's only two years old :)18:56
GeneralStupid_franck_: i think thats not 100% complete transferred?!18:57
olofkThat shows how long ago anyone paid attention to the or1200 systems :)18:57
_franck_GeneralStupid: that seems ok. Did you try to "resume" after setting npc to 0x100 ?18:58
_franck_I don't says that hard reset and get an assertion is normal18:59
GeneralStupidit would be nice to deliver a first working processor to show that openrisc could be an alternative for our institution19:00
GeneralStupidso it would be fine (first)19:00
olofkI hacked l.nop 0xc detection into or1200_monitor now and that seems to work19:00
GeneralStupid_franck_: it does not reset... but it does nothing. no printf.. and no led's19:01
GeneralStupidbut reg npc always shows the same memory address19:04
_franck_which one ?19:04
GeneralStupid0x0-10019:04
GeneralStupid> reg npc19:04
GeneralStupidnpc (/32): 0x0000010019:04
_franck_are you sure your reset signal is hooked up correctly ?19:04
GeneralStupid!19:05
GeneralStupid_franck_: give me a hint19:05
_franck_well, try to set your rst signal to '0' directly on your cpu instance19:07
_franck_do you have your top file available somewhere (I think you already give it before) ?19:08
GeneralStupid_franck_: one second19:09
GeneralStupidpastebin.com/50Um7Uea19:10
_franck_can't see anything wrong. Could you read back memory at 0x100 after you loaded your file ?19:17
GeneralStupidhow?19:18
_franck_md 0x10019:18
_franck_mdw 0x10019:19
GeneralStupid> mdw 0x10019:20
GeneralStupid0x00000100: 1800000019:20
GeneralStupidlooks good19:20
_franck_try: reg npc 0x100;step; reg npc19:22
_franck_(I never used "step" in openocd)19:23
GeneralStupid> reg npc 0x100;step; reg npc19:23
GeneralStupidnpc (/32): 0x0000010019:23
GeneralStupidnpc (/32): 0x0000010019:23
GeneralStupidtarget state: halted19:23
GeneralStupidmemory problem?19:23
olofkGeneralStupid: Maybe your memory is four bytes so you can only fit one instruction? :)19:24
GeneralStupidhttps://dpaste.de/V49z ?!19:24
GeneralStupidolofk: maybe :/19:24
olofk_franck_: Does step work in openocd? Didn't know that19:24
olofkGeneralStupid: I don't think you need to worry about those. I suspect those are simulator warnings (not sure however)19:25
GeneralStupidolofk: not on my core :=19:25
GeneralStupid:)19:25
_franck_olofk: I don't know if it work either19:26
olofkGot to implement that command to make a local version of a core in FuseSoC. That part is a bit more cumbersome than it should be19:27
_franck_GeneralStupid: it very looks like your cpu is stuck in reset19:28
_franck_could you wire the rst signal to a led to see its state (the signal you are sending to the cpu) ?19:29
GeneralStupidno wait a minute :/ Noo19:31
GeneralStupidare the pushbuttons 1 if not pressed?19:31
_franck_it depends, check the schematics19:32
GeneralStupidplease noo19:32
_franck_of let the button pressed while doing some tests :)19:32
_franck_but that would be a classic mistake19:33
olofkGeneralStupid: Pleeeeease let us know. I'm super curious to know if an inverted reset was the problem :)19:41
GeneralStupidmaybe i should just quit this channel in that case19:43
GeneralStupidi will try that tomorrow, iam already in bet but i want to look at the de2 documentation19:44
GeneralStupidthe button default state is high19:47
GeneralStupidok give me help the clkgen wants a "asynchronus active low" reset19:50
GeneralStupidlow active : pressed high, not pressed low??19:51
_franck_active low is...active low19:52
_franck_it means when nothing happens, idle, it's high19:53
GeneralStupidit looks like that it is ok19:57
GeneralStupidim totally out. i try to negate it, i dont have so many choices left ;) thank you, i talkt to you tomorrot20:07
olofkGeneralStupid: You're probably close now, so don't give up :)20:09
GeneralStupidolofk: i wont :)20:10
andrzejr_franck_, is this a memory error or an issue in memtest (barebox)?22:06
andrzejrhttp://pastebin.com/Aa8JX2KS22:06
andrzejrI'm asking because the memory test has failed just before the end of the test (address 0x01b778cc, tested memory space: 0x00000000 -> 0x01b77fff)22:08
--- Log closed Tue Oct 20 00:00:34 2015

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