| --- Log opened Fri Feb 27 00:00:59 2015 | ||
| stekern | olofk: even after this? https://github.com/openrisc/linux/commit/1d5fcfbe7d71a2df3eb9402f1e5351eae2f6319f | 03:05 |
|---|---|---|
| olofk | Yes, even after that. Also, I had to copy libc.so to /lib as some symlink pointed to that | 07:00 |
| olofk | stekern: What's that python script doing there btw? | 07:06 |
| olofk | And this is the binary https://www.dropbox.com/s/qpcmwjeonjbjlx5/ethtool?dl=0 | 07:09 |
| stekern | olofk: "Also"? all libs are already in /lib/ | 09:09 |
| stekern | "it works here"(tm) | 09:10 |
| stekern | and the python script is there because I just copied all *so* | 09:11 |
| n0bawk | 0 | 09:37 |
| GeneralStupid | fusesoc didnt work for me at the moment if i do more pathing at my local repo to get it work, is it possible to get git access? i would like to help a bit. propably it would be a good idea if fusesoc support multiple repos | 10:16 |
| GeneralStupid | pathing => patching | 10:17 |
| n0bawk | >:3 | 10:19 |
| n0bawk | .g fusesoc | 10:19 |
| n0bawk | ,g fusesoc | 10:19 |
| poke53281 | olofk: Did you solve your shared libs problem? | 10:42 |
| stekern | GeneralStupid: just do a pull-request with your changes | 10:52 |
| GeneralStupid | i need to get more into git :-D | 11:08 |
| GeneralStupid | im more that svn guy - its fine for my projects ( max. 3 members ) | 11:08 |
| olofk | GeneralStupid: FuseSoC supports multiple repos | 11:29 |
| olofk | Just add them to the cores_root variable in fusesoc.conf | 11:29 |
| olofk | With spaces between them | 11:29 |
| olofk | Later entries override earlier ones | 11:29 |
| olofk | And you can specify --cores-root=/path/to/cores to add more paths at runtime as well | 11:30 |
| GeneralStupid | i meant into the core configuration so one core tries e.g. Svn and if not available git ... | 11:34 |
| olofk | poke53281: No, but I haven't tried anything more | 11:36 |
| olofk | stekern: Are you sure libc is there? There is a *.so entry in .gitignore, so you might have missed it | 11:36 |
| olofk | stekern: And does "it works here" mean that the ethtool I sent you works for you? | 11:37 |
| olofk | GeneralStupid: Yes, I've considered that, but we have only had one location for the repos, and that has worked fine until now, so I have prioritized other things | 11:38 |
| olofk | And as stekern said, just clone the repo and submit a pull request or send patches | 11:39 |
| olofk | if you have stuff that should be fixed | 11:39 |
| stekern | olofk: .gitignore... ah! | 11:40 |
| stekern | ...and yes, the ethtool works | 11:42 |
| olofk | Weird | 11:42 |
| olofk | Could it be something with some collect something thingie? | 11:42 |
| olofk | stekern: Can you make your libc available somehow, so I can try with that? | 11:43 |
| stekern | I'm commenting out the *.so entry in my .gitignore and committing the .so files right now | 11:43 |
| olofk | cool | 11:44 |
| olofk | I did a shallow clone. Will that come back to haunt me now when I pull? | 11:45 |
| stekern | what is a shallow clone? | 11:47 |
| olofk | clone --depth=1 | 11:47 |
| olofk | Because computer is small and slow. Linux repo is huge | 11:47 |
| stekern | ah, not sure | 11:48 |
| olofk | Well, I'll notice | 11:48 |
| olofk | GeneralStupid: Are you still having problems with adv_debug_sys? | 11:48 |
| GeneralStupid | yes i think so, but iam in a train so ill try later again | 11:49 |
| olofk | Yeah, that's probably a good idea. There's a bug in FuseSoC that prevents it from working on trains | 11:50 |
| olofk | But since I'm mostly travelling by bus I haven't fixed that yet | 11:50 |
| stekern | why can't I push to github now? | 11:53 |
| GeneralStupid | that bug is called " there is no mobile internet faster then edge " 3 | 11:55 |
| stekern | olofk: try to pull now | 12:04 |
| olofk | Yes! That works | 12:08 |
| olofk | Thanks | 12:08 |
| olofk | Why doesn't git apply always work? Nothing happens when I'm trying to apply one of the patches | 12:25 |
| olofk | No errors. Nothing | 12:25 |
| olofk | Applying it with patch instead gives me a lot of failures | 12:30 |
| stekern | what does the patch look like? | 12:31 |
| olofk | Does anyone have a local copy of the i2c svn repo I can copy? Want to check if there were some issues with the git conversion | 12:31 |
| olofk | stekern: It's the first patch in the i2c core if you have orpsoc-cores around | 12:32 |
| olofk | Might be line-endings or something like that | 12:32 |
| olofk | I cloned the i2c freecores repo and trying to apply the patches against that | 12:32 |
| stekern | apply that with 'git am' instead | 12:42 |
| olofk | That almost worked | 13:25 |
| olofk | Or maybe not at all. Looks like it fails on the first chunk | 13:26 |
| olofk | Fuck it. I give up | 13:29 |
| Me1234___ | To use opencores ethmac what kernel config options are required? I have now only opencores ethmac driver enabled. | 15:02 |
| stekern | Me1234___: if you use the or1ksim_defconfig it becomes enabled | 15:06 |
| GeneralStupid | ok, now fusesoc tells he is fetching adv_debug_sys but nothing happens | 15:58 |
| olofk | Me1234___: In my case, I had to enable support for my Micrel phy as well | 16:28 |
| olofk | At least I think it didn't work otherwise | 16:28 |
| olofk | Then you need to enable the networking stack as well of course, but the ethoc driver should be enough for the hw | 16:29 |
| olofk | GeneralStupid: Hmm... | 16:32 |
| olofk | Nothing in ~/.cache/fusesoc/adv_debug_sys? | 16:32 |
| GeneralStupid | only an .svn directory | 16:34 |
| GeneralStupid | should try to delete it i guess | 16:34 |
| Me1234___ | olofk: I think that opencores SVN is down. But I am not sure about now. | 16:36 |
| GeneralStupid | Me1234___: yes it is, because of that we/i try to change some to the github repo | 16:37 |
| GeneralStupid | olofk: is it ok to completely remove the .cache dir? Then everything should be fetched again? | 16:37 |
| Me1234___ | GeneralStupid: fusesoc cache is located in .cache/fusesoc | 16:38 |
| GeneralStupid | Me1234___: i was just to lazy to write the whole path... | 16:39 |
| GeneralStupid | --verbose does not give me anything new | 16:41 |
| olofk | GeneralStupid: Yes, you can remove .cache/fusesoc and it should fetch thigns again | 17:03 |
| olofk | GeneralStupid: Did you replace the provider section in adv_debug_sys? Otherwise it will just try to fetch from opencores again | 17:08 |
| olofk | And the svn server seems to work enough to create the directory which is all FuseSoC looks at and assumes everything is downloaded ok | 17:09 |
| olofk | This turned out to be a great fire drill for FuseSoC. Error handling is apparently not very good :) | 17:10 |
| GeneralStupid | olofk: yes i replace this | 17:11 |
| GeneralStupid | olofk: i dont know... i deleted the cache dir and now it does anything ... | 17:13 |
| GeneralStupid | give me a minute :) | 17:13 |
| GeneralStupid | ok jtag_tap is not reachable | 17:14 |
| GeneralStupid | i try changing it to github | 17:14 |
| olofk | GeneralStupid: That will unfortunately not work either :( | 17:19 |
| olofk | But you might get away without that if you only want to build (not simulate) | 17:20 |
| olofk | Remove it from the depends | 17:21 |
| GeneralStupid | ok, but the ERROR: Cannot find rtl/verilog/adbg_wb_biu.v in : | 17:21 |
| GeneralStupid | is back, because it isnt there | 17:21 |
| olofk | Yes, you need to prefix all file paths with Hardware/adv_dbg_if/ | 17:22 |
| olofk | In adv_debug_sys.core | 17:22 |
| GeneralStupid | stop... | 17:24 |
| GeneralStupid | I think i need to change in system/de1/de1.core | 17:24 |
| GeneralStupid | ? | 17:26 |
| olofk | GeneralStupid: Yes, remove jtag_tap from depend in that file | 17:27 |
| GeneralStupid | ok i did but then adv_debug_sys is not like it should be | 17:27 |
| olofk | Did you fix the file paths in adv_debug_sys? | 17:27 |
| GeneralStupid | copy Hardware/adv_dbg_if/ into the directory? | 17:29 |
| GeneralStupid | ohh nice | 17:29 |
| GeneralStupid | quartus.sh not found, but that should be easy to fix :-D | 17:29 |
| olofk | GeneralStupid: Just add quartus' bin directory to your path | 17:32 |
| GeneralStupid | but there is no quartus.sh :/ | 17:33 |
| olofk | There shouldn't be a quartus.sh | 17:33 |
| olofk | Just a quartus | 17:33 |
| olofk | Does FuseSoC tell you it's looking for quartus.sh? | 17:34 |
| GeneralStupid | works | 17:34 |
| olofk | Good. One step further at least. Might still be some build errors | 17:34 |
| GeneralStupid | yes sir | 17:34 |
| GeneralStupid | he is missing the oe1200 top | 17:35 |
| olofk | Comment out `define OR1200_CPU from de1/rtl/verilog/include/orpsoc-defines.v | 17:36 |
| GeneralStupid | but should that be automatically, because i removed the dependence? | 17:39 |
| GeneralStupid | ok ok propably i need to change the pinout | 17:42 |
| GeneralStupid | ... fitter | 17:43 |
| GeneralStupid | olofk: thats good, right? http://paste.debian.net/158263/ | 17:46 |
| olofk | GeneralStupid: Sehr gut | 18:12 |
| GeneralStupid | :) | 18:12 |
| GeneralStupid | thats bad :( my DE2 is at my home and i visit my parents at this weekend :) | 18:13 |
| olofk | Well, there are other things you need to fix as well. | 18:13 |
| olofk | Grab the schematic and find out the pinout for all your peripherals. Clock, reset, UART and memory to begin with | 18:14 |
| GeneralStupid | yes, thats the kind of work i love most :) | 18:15 |
| GeneralStupid | _not_ | 18:15 |
| olofk | haha | 18:15 |
| olofk | Yes, that's one of the most ugly parts of this | 18:15 |
| olofk | But Terasic might have some template you can start from | 18:15 |
| olofk | Was it a de2 70 or de2 115 btw? | 18:16 |
| GeneralStupid | only de2 | 18:16 |
| GeneralStupid | http://www.altera.com/education/univ/materials/boards/de2/unv-de2-board.html | 18:17 |
| olofk | aha. They really should take a look at how they name those things. It's very confusing | 18:17 |
| olofk_ | Doh. Managed to slip on the keyboard and kill the screen session | 18:19 |
| olofk_ | Or wait... | 18:19 |
| olofk_ | olofk: Get out | 18:20 |
| olofk_ | It would be great if someone could send over a copy of the OpenCores i2c repo. I have managed to patch the other cores, but there's something funky with that one | 18:25 |
| GeneralStupid | yes it is ... | 18:26 |
| olofk_ | Ha! I found one on another partition | 18:26 |
| GeneralStupid | We had de2-115 boards during the semester... but they first distribute their old de2 boards :) | 18:26 |
| GeneralStupid | We can keep it :) | 18:27 |
| olofk_ | Damn. That one was empty too :( | 18:27 |
| olofk_ | Cool. Looks like nice boards | 18:28 |
| GeneralStupid | its really nice for playing or for developing stuff... | 18:28 |
| GeneralStupid | Lots of outputs :) | 18:28 |
| GeneralStupid | lots of inputs | 18:28 |
| GeneralStupid | but quartus is slooow | 18:28 |
| olofk_ | Well. I can agree with all three statements :) | 18:35 |
| olofk_ | But it's a lot faster than what ISE was a few years ago. It took 8 hours on our beefy build server for one device I was working on | 18:36 |
| olofk_ | That one also had 180 clock domains, which kind of forced me to learn to constrain things properly :) | 18:36 |
| stekern | olofk_: is the one in cache the svn copy or does that have patches applied? | 18:43 |
| olofk_ | stekern: It's got the patches applied | 18:44 |
| olofk_ | stekern: You got a copy? | 18:44 |
| stekern | I've got cash! | 18:44 |
| stekern | err... s/cash/cache | 18:45 |
| olofk_ | :) | 18:45 |
| olofk_ | Are you trying to set up a cache for cash deal? :) | 18:45 |
| stekern | http://oompa.chokladfabriken.org/openrisc/i2c.tar.xz | 18:46 |
| olofk_ | Fantastic! Thanks | 18:46 |
| stekern | I also have an almost working two level and one level pagetable implementation in lk | 18:47 |
| olofk_ | cool! | 18:47 |
| stekern | slightly annoying that the or1k l1 page table sections are 16MB... | 18:48 |
| olofk_ | What would be a more common value for that? | 18:48 |
| stekern | 1MB perhaps | 18:48 |
| olofk_ | Does that mean you will only get half a page on many of the low end FPGA boards? | 18:49 |
| stekern | if I disregard what the arch manual says and ignore hw refill, I can of course set it up however I'd like | 18:49 |
| stekern | I had 1MB sections in the beginning, and no l2 tables at all | 18:50 |
| olofk_ | What the hell is really in the freecores clone of i2c? It doesn't at all look like the one you sent me | 18:51 |
| olofk_ | blueCmd: Do you remember any funkiness in i2c when doing the svn to git conversion? | 18:52 |
| olofk | hmm.. | 19:11 |
| olofk | screen is confusing | 19:11 |
| olofk | ok, so I think the problem with i2c is that the copy on freecores is broken | 19:12 |
| olofk | A local SVN copy doesn't contain older revisions, right? | 19:17 |
| stekern | olofk: no, svn is completely handicapped without the remote server | 19:46 |
| olofk | Gahh.. I'll kill myself if I have to patch many more cores. Damn you OpenCores SVN! | 20:29 |
| rschmidlin | stekern, do you know why most memory controllers of orpsoc-cores systems incorporate arbiters and offers at least separate instruction and data interfaces? | 20:45 |
| GeneralStupid | olofk: :( | 20:46 |
| rschmidlin | stekern, why not rely on the interconnect arbiter itself? | 20:47 |
| stekern | rschmidlin: because often the memory controller has a better idea how to arbiter the data towards the memory than the generic arbiter | 20:49 |
| rschmidlin | Thanks stekern. I was recently trying to put up a testing system myself using only blockrams (wb_ram_b3.v) for a starter. It did work. Surprisingly, it does not work with the caches. Any ideas? | 20:54 |
| stekern | I'd probably need a better definition of 'not work' to have ideas ;) | 20:55 |
| rschmidlin | Certainly :). | 20:56 |
| GeneralStupid | olofk: do you have the repositories? | 20:56 |
| rschmidlin | I have started an assembler which invalidate all cache lines and enables both caches and then starts a "Hello World". | 20:57 |
| stekern | but, one thing that is different when you use caches is that the accesses are bursts, when they are disabled all accesses are 'classic' | 20:57 |
| rschmidlin | If I don't enable the caches, it runs through. | 20:57 |
| stekern | which was the wb_ram_b3.v? | 20:57 |
| rschmidlin | exactly | 20:58 |
| rschmidlin | wb_ram_b3.v should actually support burst accesses | 20:58 |
| rschmidlin | Unfortunatelly, I couldn't find out much on simulation since it works there. | 20:58 |
| rschmidlin | When I run it on FPGA, the CPU gets an exception. | 20:59 |
| stekern | what FPGA? | 21:00 |
| rschmidlin | I don't have my notes here. But I remember that the data cache got me a buserror. The instruction cache a trap, if the debugger is not misleading me here. | 21:00 |
| rschmidlin | Artix 6 | 21:00 |
| rschmidlin | The design is timing clean. Thus, I'm kind of clueless here. | 21:01 |
| rschmidlin | Olof pointed me to try out wb_ram.v instead which actually made the system work with the data cache (boggles). | 21:02 |
| rschmidlin | From the instruction cache I still got the trap instruction. I thought it might come from non-invalidadted cache lines. But the trap opcode is not zeroes and I believe the lines would be zeroed on FPGA, wouldn't they? | 21:03 |
| rschmidlin | That's where I suspected the arbiters/wishbone interface. | 21:03 |
| rschmidlin | --report done-- | 21:03 |
| stekern | you could try to half rule out/in mor1kx by just supporting classic cycles at the block ram | 21:05 |
| rschmidlin | I see, I deny the burst accesses and see if it works, meaning the bursts are not working reliably. | 21:12 |
| stekern | mor1kx is a bit picky about that the slaves implement the bursting correctly, but it's weird that it works in simulation for you | 21:16 |
| stekern | I've had some sim/target discrepancy on blockrams with Xilinx targets though | 21:17 |
| rschmidlin | very. But I will only be able to test it on monday now. I have it running at work. | 21:17 |
| rschmidlin | stekern, in case that's the problem. How could I make the slave behave 'properly'? | 21:18 |
| rschmidlin | My development board at home is a spartan3a-dsp-kit. I've been facing problems synthesizing mor1kx with ISE. I have adapted quite many spots last weekend and ran finally into multiple signal drivers on the data output of the internal cache rams. | 21:20 |
| GeneralStupid | rschmidlin: what exactly are you trying? | 21:20 |
| stekern | multiple signal drivers? | 21:23 |
| GeneralStupid | it sounds a lot like what i want to do | 21:25 |
| olofk | rschmidlin: Come to think of it, I have a vague memory that blueCmd had some problems with the bursting using wb_ram on a Xilinx device. I think he disabled the bursting code in wb_ram | 21:25 |
| rschmidlin | until that point I was basically rewriting sensitivity lists of combinatorial blocks (always @(*)) that included memory arrays. ISE didnt like that. I have to launch ISE to check that, maybe I can paste the result to you. | 21:26 |
| rschmidlin | olofk, good call, history is on my side. | 21:27 |
| stekern | that must be spartan3 specific, I haven't seen problems like that with ISE on other devices | 21:28 |
| stekern | but if you have some results I can look at, by all means, give them to me ;) | 21:33 |
| stekern | and if you're able to do some on-chip logs I can take a look at them too | 21:34 |
| olofk | GeneralStupid: I got something for you | 21:34 |
| olofk | Take this archive : https://www.dropbox.com/s/ua2xycfz43ymg90/newcores.tar.gz?dl=0 | 21:36 |
| olofk | extract it somewhere and add the path to your fusesoc.conf | 21:36 |
| rschmidlin | GeneralStupid, I am trying to implement a basic mor1kx system on my spartan3a-dsp-kit | 21:42 |
| olofk | GeneralStupid: To explain a bit, these files will override the ones in your default orpsoc-cores so that you won't have to make any changes there | 21:43 |
| olofk | Got to sleep now. Daughter got a fever and wakes up every 20 minutes, so I will have to be prepared to do the same :) | 21:44 |
| rschmidlin | i hope she gets better soon olof | 21:47 |
| rschmidlin | pastie does not allow me to paste the whole xst log | 21:47 |
| rschmidlin | stekern, I have created a file in my google drive and shared it with you | 21:49 |
| GeneralStupid | olofk: me too, thank you. I could host it on my subversion - if you are interested in. Because it would be easier to change (with perl for example) | 21:55 |
| GeneralStupid | rschmidlin: ok. Me Too | 21:55 |
| GeneralStupid | rschmidlin: but it sounds like you want to implement a coprocessor (IP Slave) | 21:56 |
| GeneralStupid | but ... i propably misunderstood, i need some more informations about the wishbone | 21:58 |
| --- Log closed Sat Feb 28 00:00:00 2015 | ||
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