| --- Log opened Wed Feb 25 00:00:56 2015 | ||
| -!- Netsplit *.net <-> *.split quits: tariq786, mafm, sfa | 01:16 | |
| -!- Netsplit over, joins: sfa, tariq786, mafm | 01:20 | |
| -!- Netsplit *.net <-> *.split quits: blueCmd, rhythmx, ssvb, julzmb, Ptishell, GeneralStupid, kiwichris | 01:35 | |
| -!- Netsplit over, joins: kiwichris, julzmb, ssvb, blueCmd, rhythmx, GeneralStupid, Ptishell | 01:39 | |
| -!- Netsplit *.net <-> *.split quits: blueCmd, rhythmx, ssvb, julzmb, Ptishell, GeneralStupid, kiwichris | 01:40 | |
| -!- Netsplit *.net <-> *.split quits: sheridp | 01:40 | |
| -!- Netsplit over, joins: kiwichris, julzmb, ssvb, blueCmd, rhythmx, GeneralStupid, Ptishell | 01:41 | |
| stekern | olofk: I've had an off-list discussion with jonas that I'll step in as co-maintainer while he's too busy to properly maintain the openrisc | 01:48 |
|---|---|---|
| stekern | and to be clear, he initiated the discussion | 01:52 |
| -!- Netsplit *.net <-> *.split quits: sheridp | 02:10 | |
| -!- Netsplit over, joins: sheridp | 02:16 | |
| olofk | stekern: That's great. | 07:16 |
| Me1234_ | Why does this happen after linux is working on de0_nano for some time http://pastie.org/9981389 ? | 15:01 |
| Me1234_ | And, It seems that SPI flash gets rewritten somehow. Next boot shows these errors, but somehow works. | 15:03 |
| Me1234_ | Actually SPI flash contents do NOT get rewritten. | 15:07 |
| Me1234_ | I powewed it off for too small period of time, so ram did not discharge. | 15:08 |
| Me1234_ | But it does not solve this question: | 15:15 |
| Me1234_ | Why does this happen after linux is working on de0_nano for some time http://pastie.org/9981389 ? | 15:15 |
| Me1234_ | http://pastie.org/9981449 | 15:24 |
| olofk | Me1234_: Never seen that one before. | 17:18 |
| ams | hmm.. | 17:55 |
| ams | olofk: got a sec_ | 17:55 |
| sheridp1 | I noticed that when compiling my bootloader for the openrisc, it does not matter what I set the ORIGIN to be in my linker script; then I read that when using objcopy (to generate a bin file from elf) "All symbols and relocation information will be discarded." Does anyone know if this is the reason? | 18:09 |
| GeneralStupid | Hi | 18:19 |
| GeneralStupid | my Altera DE-2 Board is there :) | 18:19 |
| Me1234_ | olofk: Now ok, when recompiled busybox with or1k-linux-gnu-gcc | 18:20 |
| GeneralStupid | Which one is a good core implementation? | 18:34 |
| GeneralStupid | shoud i use trunk? | 18:34 |
| GeneralStupid | please give me a start point... what does i need to use newlib and openrisc on my altera board? | 18:42 |
| sheridp1 | GeneralStupid: What are your performance/area constraints. I'm using a Spartan6 so I need a smaller design, and have been using the AltOR32 implementation. | 18:43 |
| GeneralStupid | sheridp1: i have 35000 LEs and 8Mb RAM | 18:44 |
| sheridp1 | That's a fairly sizeable FPGA; I think you could implement the full pipelined openrisc processor | 18:50 |
| GeneralStupid | it is an DE2 development board from terasic | 18:50 |
| GeneralStupid | what i want is the wishbone bus (for "slaves") and one Master | 18:50 |
| sheridp1 | OR is wishbone compatible | 18:51 |
| sheridp1 | You might want to checkout FuseSOC (newer but less documented) or MinSOC if you want to get a complete system up and running | 18:52 |
| GeneralStupid | sheridp1: first of all i need some introduction how that git repo is organized | 18:55 |
| sheridp1 | Try googling it: http://www.minsoc.com/ there is plenty of documentation | 18:57 |
| GeneralStupid | whats the different between fusesoc and minsoc? | 18:58 |
| GeneralStupid | they are both different implementations from openrisc? | 18:58 |
| sheridp1 | those projects are focused on rapid SOC development | 18:58 |
| sheridp1 | The idea is that you can plug and play WB compatible components | 19:00 |
| GeneralStupid | WB means wishbone? | 19:00 |
| sheridp1 | yes | 19:00 |
| sheridp1 | there's also https://github.com/juliusbaxter/mor1kx-dev-env/wiki/OpenRISC-SoC-usage-basics which is based on the mor1kx implementation of OpenRISC | 19:01 |
| sheridp1 | The difference between these projects is which processor implementation they use. mor1kx I think is a rewrite of the OR1200, and is configurable to have a 0, 3 or 5 stage pipeline | 19:02 |
| sheridp1 | I think fuseSOC is an attempt to standardize these systems so that you can use a simple configuration script and build an SOC. It's a great idea, but at the moment, I found the lack of documentation a deterrent | 19:03 |
| GeneralStupid | so they try to develop fusesoc that it is more like the leon | 19:04 |
| sheridp1 | I'm not familiar with LEON, except that it is based on the SPARC ISA, but I thought it was just one processor design whereas fuseSOC allows plugging in different processors | 19:06 |
| GeneralStupid | ok what i need to know is.... | 19:07 |
| GeneralStupid | The minsoc is _one_ implementation, and a well documentated one? | 19:07 |
| sheridp1 | I think so, but your mileage may vary. I had some trouble installing minsoc -- library dependencies were outdated, so I gave up and decided on the AltOR32 implementation from ultraembedded | 19:10 |
| GeneralStupid | is it easy to access e.g. the display ? | 19:12 |
| sheridp1 | using what? I never got minsoc to work. For my altor32 system, I don't have a display, but you can probably find a display module on opencores.org and connect it to the wishbone bus | 19:13 |
| GeneralStupid | ok :) | 19:14 |
| GeneralStupid | the install script from minsoc is not accessible | 19:14 |
| sheridp1 | Are you just trying to get _any_ system up and running or are you interested in openrisc specifically | 19:15 |
| GeneralStupid | iam interested in any system which is open source and has a Bus system for co processors | 19:16 |
| GeneralStupid | i want to use newlib. I think openrisc fits best | 19:16 |
| sheridp1 | Well for what its worth, you can check out https://github.com/ultraembedded/altor32 or my own repo https://github.com/sheridp/altor32/tree/mojo and base your design off that | 19:19 |
| sheridp1 | But I think the mor1kx will offer better performance | 19:21 |
| sheridp1 | I just found http://wiki.mintsoc.org/doku.php?id=openrisc_tutorial | 19:21 |
| sheridp1 | which is a mor1kx on a DE0 nano board; you could probably modify that pretty easily | 19:21 |
| GeneralStupid | sheridp1: thats a good starting point i guess | 19:23 |
| sheridp1 | OK, so my gut feeling is this: objcopy ignores ORIGIN from the linker_script, moving everything to 0x0, and then the .org commands are followed. Nonetheless, the ORIGIN command is needed if the linker produced any position-dependent code such as jumping to an immediate value, and you need to actually store the objcopied code beginning at ORIGIN. | 19:53 |
| olofk | ams: Here now | 20:06 |
| olofk | sheridp1: objcopy doesn't move things to zero. I know this because I spent a lot of time trying to actually move everything to zero without success :) | 20:07 |
| ams | olofk: i need to stroke your beard for ideas. | 20:07 |
| ams | i.e. i need 10 minutes of your time, in private. >:) | 20:08 |
| sheridp1 | olofk: so if you take a look at the output of objcopy -O binary using xxd, you'll find that the code begins at the first .org rather than ORIGIN + .org; essentially everything is shifted back by ORIGIN when compared to the lst file | 20:09 |
| olofk | ams: Well, in that case you're fucked https://drive.google.com/open?id=0BxK6fsSBnsbTR2ZJMm9tZmY2Njg&authuser=0 | 20:09 |
| ams | NOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOO | 20:10 |
| olofk | Don't worry. I look like a retard, so it's growing back | 20:11 |
| olofk | sheridp1: Do you have an elf you can share? | 20:38 |
| sheridp1 | Sure, just a minute | 20:39 |
| sheridp1 | How should I share it with you? | 20:41 |
| olofk | sheridp1: You can mail to olof.kindgren@gmail.com | 20:43 |
| Me1234_ | How can I use GPIO driver from linux 3.18 on linux 3.19. I compiled it as a module, When I load it, leds do not blink,howewer they are enabled in dts and kernel config | 20:58 |
| Me1234_ | http://pastie.org/9982354 | 20:59 |
| GeneralStupid | i cant just install some libs.. i need some background informations on this... | 21:06 |
| olofk | Me1234_: And it works in 3.18 with the same FPGA image? | 21:07 |
| sheridp1 | Has anyone tried -Wl,--gc-sections with or1k gcc? I'm finding that it stripped everything but the .bss out of the elf. Maybe it's not supported? | 21:18 |
| olofk | sheridp1: I vaguely recall that there was some bug regarding --gc-sections, but I think that was fixed | 21:24 |
| GeneralStupid | olofk: you work on fusesoc, right? | 21:26 |
| sheridp1 | olofk: thanks, I think I'll just avoid it for the time being | 21:29 |
| olofk | sheridp1: Reading the files you sent me, I realize that you probably know several times as much about elf and linkers than I do :) | 21:31 |
| olofk | So I'm not sure how helpful I can be. I would have assumed that start would end up at 0x2ee8, but it looks like it's at 0x0 in the bin. That was your issue, right? | 21:33 |
| sheridp1 | olofk: definitely not, tbh I'm usually a python developer so all this is foreign to me, but I'm learning | 21:34 |
| olofk | GeneralStupid: Yes I do. Released FuseSoC 1.2 yesterday btw | 21:34 |
| sheridp1 | Yeah, in the bin it ends up at .org rather than ORIGIN + .org; which is fine; just a curiosity. But I'm guessing you have to load the code at 0x2ee8 and not 0x00 (or anywhere else) in case their is position-dependent instructions | 21:35 |
| olofk | sheridp1: Yeah, I'm learning too. Lots of fun, combined with a lot of what-the-hell-is-going-on moments | 21:35 |
| sheridp1 | *there | 21:35 |
| sheridp1 | *are | 21:36 |
| olofk | sheridp1: Just to get this straight, if the code is position independent, there's nothing to worry about, right? | 21:37 |
| GeneralStupid | olofk: is this stable and where do i find the configurator of this? | 21:37 |
| olofk | GeneralStupid: FuseSoC generally works fine for creating OpenRISC-based SoCs. There are a few ready-made systems available. Not for de2, but for both de0_nano and de1. I guess those would be your starting points | 21:39 |
| sheridp1 | olofk: I would think so because then all the jumps/branches would be relative to the PC; but if you had something like jmp <target> where target was at some fixed location or e.g. grabbing some data that was supposed to be at a fixed location; then if you loaded the code at the wrong spot, it would jump/grab from the wrong location | 21:39 |
| sheridp1 | actually, my code worked even without compiling with -fPIC, but I think I was just lucky in that, because the code is so short, it always chose to do things relative to the PC anyway | 21:40 |
| olofk | Hmm.. is there some quick way to test that? Maybe you could define a global variable and put that in its own section | 21:42 |
| olofk | Come to think of it, I've probably never defined my own linker script for OpenRISC. Just used the default ones | 21:42 |
| olofk | I see that you're using or1k-nd btw. Does altor32 implement that? | 21:43 |
| sheridp1 | yeah, I was trying to think of something, maybe a global variable would work. I did try doing a little assembly using a l.jr operation, and confirmed that the objcopy does not modify the jump address (which makes sense, how would it know), but let me try with a global variable | 21:44 |
| sheridp1 | yes AltOR32 implements the full OR ISA (I think), but does not use a delay slot so you have to compile gcc to not use it (and a whole bunch of other things like multipliers, dividers, etc) | 21:45 |
| GeneralStupid | is there a way to use the altera usb blaster for UART? | 21:46 |
| Me1234_ | olofk: Yes, it works with 3.18 (github.com/bluecmd/or1k-linux), but does not with 3.19 form kernel.org. Note that in 3.19 I load it after startup, in 3.18 it is in kernel | 21:46 |
| GeneralStupid | And most of the links dosnt work anymore | 21:46 |
| olofk | GeneralStupid: We have experimented with running UART over JTAG with a USB Blaster. There seems to be some problems with the interrupts, so it works fine in polling mode, but when the IRQ is enabled, things break down | 21:51 |
| olofk | Me1234_: There have been many patches recently that haven't been upstreamed yet, so I'm not sure if you can use the one from kernel.org | 21:52 |
| olofk | We have decided that the one on https://github.com/openrisc/linux is our official OpenRISC kernel for now. It would be great if you could try that one | 21:52 |
| Me1234_ | olofk: 3.19 actually boots. | 21:53 |
| olofk | sheridp1: I see. Haven't had time to try out altor32 yet | 21:53 |
| GeneralStupid | i get back to this later | 21:53 |
| GeneralStupid | fusesoc list-systems displays nothing | 21:53 |
| Me1234_ | olofk: And works. | 21:54 |
| olofk | GeneralStupid: Unfortunately, the OpenCores SVN has been down for some time, which means that most of the cores that FuseSoC use isn't available. | 21:54 |
| olofk | I need to update the links to our copies on github. Haven't gotten around to do that yet | 21:54 |
| GeneralStupid | is there a fix for me?! | 21:55 |
| sheridp1 | olofk: I know! It's crazy; I don't know what is up with opencores, but I've noticed that you can often only grab the latest snapshot and nothing older | 21:55 |
| GeneralStupid | Thats some of my probs, i wanted to try this one: http://www.minsoc.com/1_0:configuration | 21:55 |
| GeneralStupid | but its down too | 21:55 |
| olofk | GeneralStupid: The only fix right now is patience | 21:55 |
| olofk | sheridp1: We're trying to get their attention, but they are hard to reach sometimes. Good thing we have clones of all repos on github | 21:56 |
| GeneralStupid | wheres the copy of minsoc on github? | 21:57 |
| olofk | Me1234_: Ah.. I just saw that you only loaded it as a module on 3.19. Have you tried to build it into the kernel on 3.19? | 21:57 |
| olofk | GeneralStupid: I think this one should do https://github.com/freecores/minsoc | 21:58 |
| olofk | GeneralStupid: The minsoc developer (rschmidlin) is usually here at least every week, so you could see if you can catch him | 21:59 |
| olofk | I'll do a mass change of the repo locations tomorrow. Unfortunately my ordinary dev computer is on repair, so I can't do much testing to see that everything works as expected | 22:00 |
| olofk | Oh well. This will have to do for tonight. Good luck all of you. Let me know if things magically start to work :) | 22:02 |
| GeneralStupid | olofk: its totally fine, its hard to get into it... But i think you (all the Openrisc guys) had done a lot of work. | 22:02 |
| GeneralStupid | olofk: good night and thx 4 help | 22:02 |
| GeneralStupid | sheridp1: thank you too | 22:02 |
| olofk | No problems. | 22:02 |
| sheridp1 | olofk: OK I think I've got it--yes you will run into problems if you have position dependent code. I added a global variable to blink.c and saw from the lst file it's stored at the beginning of the .data section (0x2f24). Then in start, I increment it and it accesses 2f24 as expected. In the .bin hexdump however, I can see that it still accesse | 22:18 |
| sheridp1 | s 2f24, but the data has been shifted all the way to 3c (which is 0x2f24 - 0x2ee8). Thus if I ran this code, loaded at 0x00, it would still access 0x2f24 and get the wrong value. | 22:18 |
| sheridp1 | Also taking an objdump of blink.o shows that the VMA and LMA of everything is 0x0000, whereas in the elf, .data is 0x2f24 so these must get resolved at link-time to produce usable, position-dependent code | 22:23 |
| sheridp1 | As a final test, I tried using -fPIC when compiling and it does nothing! 2f24 is still used to access the global variable. I'm guessing position independent code isn't supported (at least on the altor32) | 22:32 |
| --- Log closed Thu Feb 26 00:00:57 2015 | ||
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