IRC logs for #openrisc Saturday, 2015-02-21

--- Log opened Sat Feb 21 00:00:50 2015
stekerndoh, I spent several minutes pondering why I hit a bus error instead of tlb miss when I turn on the mmu02:22
stekernturned out that I didn't have the mmu enabled in or1ksim config02:22
daliasstekern, :)03:00
NCommanderEvening world10:21
Me1234olofk: tracepoint_exec_pc_o[31:0] is always 0.11:22
Me1234olofk: I use iwbm_adr_o[31:0] to get the pc.11:23
Me1234olofk: The new SPI core generates 25 MHz clock, while the old one did 50MHz with the same bootrom.S form orpsocV212:57
mor1kx[mor1kx] bandvig pushed 1 new commit to withfpu:
mor1kxmor1kx/withfpu 074e9e3 Andrey Bacherov: Remove forcing zeros in LSB of addresses because (1) the forcing leads to impossibility to init UART during initialization of NewLIB-based program; (2) we already have got align control.13:15
Me1234Serious problems with spi in orpsocv3. spiflash-program.elf must not stop working because of wrong SPI clock (25MHz instead of 50MHz)(Changed SPR bits in SPI core)13:33
mor1kx[mor1kx] bandvig pushed 1 new commit to withfpu:
mor1kxmor1kx/withfpu e530551 Andrey Bacherov: (1) Some clean up...13:34
olofkMe1234: Yeah. This sounds bad. Do you know what bits have been changed?13:53
Me1234olofk: the SPR bits. They control the clock rate13:53
olofkaha. I see. So that's what you meant with SPR bits13:54
olofkNeed to take a closer look at this.13:55
mor1kx[mor1kx] bandvig pushed 1 new commit to withfpu:
mor1kxmor1kx/withfpu 4d599fb Andrey Bacherov: Merge branch 'master' into withfpu14:30
Me1234olofk: Uploading the vcd file.14:30
Me1234olofk: Upload failed.14:38
stekernMe1234: nothing has changed in the spi-simple core related to the SPR bits as far as I can see14:45
Me1234stekern: Look here. According to the datasheet divider should be 1614:51
stekernthere are in fact no diffs between the orpsocv2 and fusesoc/orpsoc-cores version14:51 least no functional ones14:52
Me1234stekern: Then it is more strange.14:55
Me1234stekern, olofk:         4'b0000: clkcnt <= 12'h0;   // 2   -- original M68HC11 coding14:56
Me1234from source code od simple_spi14:57
stekernbut yours is 4'b0001, no?14:58
Me1234stekern: yes14:58
stekernso it should be divide by 414:58
Me1234        4'b0000: clkcnt <= 12'h0;   // 2   -- original M68HC11 coding14:58
Me1234stekern: accidenty pasted that again14:58
Me1234        4'b0000: clkcnt <= 12'h0;   // 2   -- original M68HC11 coding14:58
Me1234stekern: That means that it is the sam in orpsoc v214:59
stekernyou keep psting the wrong line, but yeah, 4'b0001 has always been divide by 415:00
stekernthis is the first ever version released of that core:
Me1234stekern: I measured the wrong interval.15:02
Me1234stekern: It is 4.15:02
Me1234stekern: Running on de0_nano, it goes to 0x700, which is illegal instruction exception. I think I know the cause. I forgot to increase wb_ram size form 64 to 25615:05
Me1234stekern: But it faild earlier when I ran bootrom.S with wb_ram size 25615:05
Me1234stekern: But that time I had othe orpsoc.cof15:07
Me1234stekern: Will try again15:07
Me1234stekern: after wb_intercon modification I need to remove wb_s2m_dbus_* decalrations from wb_intercon.conf.15:10
Me1234stekern: Redeclaration errors15:10
poke53281Can someone see the big error? :)15:14
poke53281There is only one, which matters.15:16
stekernpoke53281: r0 isn't 015:41
poke53281stekern: correct15:50
poke53281But I don't have a clue why.15:51
mor1kx[mor1kx] bandvig pushed 1 new commit to withfpu:
mor1kxmor1kx/withfpu 263e0ce Andrey Bacherov: Some Multiplexors are re-written with minor improvement in term of LUT usage16:37
ysangkokpoke53281: did you see ?18:14
poke53281ysangkok: Yes, I starred it a long time ago.19:14
poke53281A lot of the functions are not supported like rm.19:16
poke53281And I am sure, that he didn't offer a full posix compatbility.19:19
poke53281This were only some of the reasons, why I didn't choose to implement such a library in the beginning.19:20
ysangkokok , good. im glad you considered it :)19:53
olofkSaw that someone on the OpenCores forum was as confused as I about the VGA timings :)23:04
olofkAnd fun to see someone with seemingly valid ideas about ISA improvements23:12
--- Log closed Sun Feb 22 00:00:51 2015

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