| --- Log opened Mon Nov 17 00:00:32 2014 | ||
| poke53281 | Did someone read about the new VISC CPU architecture in the news? Looks very interesting. But I am not sure if I understand it correctly. | 05:25 |
|---|---|---|
| poke53281 | Does that mean that I have a n core machine and these n cores can either work on one thread or on n threads or something in between? | 05:26 |
| LoneTech | don't know, but that sounds interesting. | 07:06 |
| poke53281 | http://semiaccurate.com/2014/10/23/soft-machines-breaks-cover-visc-architecture/ | 07:56 |
| olofk | poke53281: Is VISC implemented in JS? :) | 08:01 |
| olofk | Wow! DFI became Interconnect tech of the year at DesignCon 2007 | 09:12 |
| olofk | There must be at least as many awards as there are people on the planet | 09:13 |
| stekern | olofk: we should have some awards too! | 09:56 |
| stekern | best beard etc | 09:56 |
| olofk | stekern: I love the idea :) | 09:56 |
| olofk | stekern: I love the idea :) | 09:57 |
| stekern | I hear you | 09:57 |
| stekern | I hear you | 09:58 |
| olofk | :) | 09:58 |
| stekern | at least currently, I'm a strong contender | 10:00 |
| olofk | You need to save it for next time | 10:01 |
| stekern | it all depends on what the winner will get | 10:04 |
| stekern | one year license of fusesoc ultimate and I'm in | 10:05 |
| olofk | I'll talk to the sales department and see what they can do | 10:09 |
| olofk | oh great. So opencores bugzilla is down | 12:51 |
| olofk | ah no. My bad | 12:51 |
| maxpaln | olofk: lost a whole week to random stuff last week. About to pick up the the changes we discussed last week - just wanted to check I hadn't missed anything before I dived in | 13:12 |
| maxpaln | olofk: I have implemented the latest changes. I think this is everything now - I have added a new array called user_data[] that can be used instead of $random data for the write transactions - this is controlled via a top level parameter called USER_WRITE_DATA (set to any non-zero value). I have also updated the main transactor loop to mimic the original functionality when subtransactions=0, | 16:26 |
| maxpaln | the final thing I did was clean up the wait state insertion - it's all handled inside wb_bfm_master now, much neater. If you want to try it out it is here (https://www.dropbox.com/s/xvwvo6va9cvpudr/backend.rar?dl=0) I'll be back around later in the week in case you run into any problems. | 16:26 |
| poke53281 | olofk: Don't know. Maybe in asm.js Otherwise they wouldn't get that speed. :) | 17:18 |
| poke53281 | But I like to see finally a processor design, which might bring something new. | 17:19 |
| poke53281 | I was a little bit disappointed about the 32->64 Bit transition the last decade. No new ideas. More registers, cleaned up instruction set. | 17:22 |
| poke53281 | The only new design, which was a little bit more successful was the Itanium. And this CPU had a really interesting interface. The combination of three instructions in a group for example. | 17:24 |
| poke53281 | Unfortunately VISC doesn't seem to be that different on the instruction set level. Everything interesting happens in the first few stages in the pipline. | 17:27 |
| poke53281 | On a certain abstraction level I I find it really amazing how similar all those architectures are. | 17:33 |
| poke53281 | olofk: I want to tell you this. I really like how simple OpenRISC is. It is clean and there are almost no strange side effects. It has much less flaws than the ARM 32 design for example. (Sum up the words "UNPREDICTABLE" and "UNDEFINED" in the ARM architecture manual . I guess there are a few hundreds. ) | 17:41 |
| stekern | poke53281: you forget "the mill" | 17:41 |
| poke53281 | stekern: Never heard about it. | 17:44 |
| poke53281 | Are there any chips build? | 17:47 |
| poke53281 | At least on the paper it sound interesting. | 17:47 |
| stekern | afaik, there aren't really any implementations | 17:47 |
| nmz787_i | hi, anyone in here using Cadence tools (Concept Design Entry)? | 20:28 |
| nmz787_i | I see some mention of it in the logs | 20:28 |
| nmz787_i | I am working on scripting for schematics entry, and couldn't find a better search result than here or the Cadence forums | 20:29 |
| --- Log closed Tue Nov 18 00:00:33 2014 | ||
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