IRC logs for #openrisc Sunday, 2014-11-02

--- Log opened Sun Nov 02 00:00:05 2014
stekernon the multicore I mean00:00
poke53281#> cat /sys/devices/system/cpu/online00:00
poke53281Unfortunately it behaves more like Hyperthreading without speed benefit.00:01
poke53281No shared memory in Javascript.00:01
stekernpoke53281: did you see this btw:
poke53281Which emulator?00:02
stekernit's not really playable though00:03
stekern= slow00:03
poke53281Yes, this is what I am thinking. Vice is terrible accurate with the emulation.00:03
stekernmight be possible to tune the options to get it faster, turning off the very accurate sid emulation did a lot for that at least00:03
poke53281To emulate a C64 cycle accurate is a lot of work and very slow.00:03
poke53281do the same with the VIC if possible.00:04
poke53281There is still a C64 testsuite which fails on VICE. At least five years ago.00:05
poke53281Finally, the big question. How do I show, that I have two cores.00:11
poke53281I need htop first00:11
poke53281Hmm, the cache bits in the UPR register are set to zero.00:19
stekerncat /proc/cpuinfo will show both00:20
stekernand pressing 1 in top will show all cpus00:20
poke53281Thanks, didn't know this feature00:23
poke53281dcache size is still set to 16 bytes.00:25
poke53281So, let's see if he manages 4 cores.00:31
poke53281cat /proc/cpuinfo shows also offline cpus.00:32
poke53281so this is not enough.00:33
poke53281you have to look at  cat /sys/devices/system/cpu/online00:33
poke53281The hexadeca cpu I have seen.01:09
poke53281The first hexadeca cpu I have seen.01:09
poke53281time for a very late lunch01:13
stekernpoke53281: cool! ;)08:45
juliusbpoke53281: impressive!12:39
-!- Netsplit *.net <-> *.split quits: poke5328117:16
-!- Netsplit over, joins: poke5328117:20
poke53281*Awesome*, even the doze mode works with 16 cores. Thanks to dynticks I think.18:04
poke53281Just 160kIPS when all cores are Idle.18:05
stekernreminds me that I should look into implementing the PM stuff19:18
stekernforgot to add that to my TODO list in the slides ;)19:18
stekernstill struggling with the atomic emulation. current get screwed up somewhere when I try to emulate atomics within the kernel19:19
poke53281Everyone should save energy nowadays. Especially when he is running 16 cores :)19:42
poke53281I have really problems in running a stable system. With 16 cores I have a success rate of < 10% to see the shell.19:44
poke53281What is the maximum allowed doze time for one core on smp machines? I thought it is limited to 1 second.19:45
poke53281but at the moment some cores are idling up to 13 seconds.19:46
poke53281which is the limit of the timer of course.19:46
poke53281Hmm, I wonder if the min_delta of the timer is sufficient with my cpu shaping technique.19:53
poke53281stekern: Do you have problems with stability with 4 cores?20:00
poke53281and I get often ompic errors20:07
stekernI've seen those, but then I've had timing violations20:35
stekernrunning at 50 MHz, it's really stable20:35
stekernbut that doesn't mean that you're not hitting some bug20:35
stekernI think idle up to the max res of the timer is expected20:36
poke53281After I see the bash it is very stable.20:36
stekernbut you got the rcu stalls, thinking a bit more, I'm not sure if those are actually caused by the ompic locking up or the other way around20:38
poke53281Is it Ok if ompic tries to wake up the cpu that is doing the request?20:56
stekernwell, that shouldn't happen21:01
poke53281But it happens. Very often.21:01
poke53281Can you check this?21:02
stekernit's ok if the requester is not in the locked section21:02
stekernthe opposite is what shouldn't be able to happen21:02
stekerniow, it's ok to have several IPIs in flight at the same time21:04
poke53281False alarm. I mixed this with the IRQ acknowledge21:04
poke53281With more and more cores I increase the chance of being stalled during the boot process.21:06
poke53281And I don't have a clue why21:07
poke53281are the lwa and swa instructions somehow connected between the cores?21:12
poke53281I mean the saved address21:16
poke53281and is the snoop hit important here?21:16
stekernsnoops are only important if you have dcache21:21
stekernwhich you don't21:21
stekernsorry, wrong21:21
stekernyou of course have to use the snoops to break the atomic link21:22
stekernin case of a store to the linked address21:22
poke53281is there one linked address for each core? Or one for the whole cpu?21:26
poke53281well, this shouldn't matter in my implementation. Only if you jump between an lwa and swa it could switch the core.21:27
poke53281Sorry if this is really a stupid question. I think I know the answer. But I want to be very sure here.21:32
stekernone per core21:32
poke53281even 8 cores are very stable.21:57
poke5328110 is already too much21:59
poke53281Ok, let's push the patches.22:04
poke53281now I need a nice framebuffer demo :)22:21
poke53281maybe a nice old school plasma demo.22:23
poke53281but probably just an fractal.22:24
stekernhere's the fading starfield demo if you want to give that a go:
stekernI still have one old demo effect I originally wrote in the 90's that I haven't tried running on openrisc, water22:32
stekernI already ported it to SDL sometimes during the 00's22:33
poke53281Let's see23:19
poke53281thanks for the code.23:20
poke53281first htop :)23:22
poke53281Hmm, I can try to publish on Hacker news after everything works. Any ideas? for title, website updates?23:28
poke53281"Online Emulator runs multicore OpenRISC machine"23:36
poke53281htop runs23:36
poke53281Ok, it is still unstable after a while. Also with 4 cores.23:57
--- Log closed Mon Nov 03 00:00:06 2014

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