IRC logs for #openrisc Thursday, 2014-09-18

--- Log opened Thu Sep 18 00:00:57 2014
poke53282I wish there would be a lib which combines every machine dependent code. strace, ltrace, gdb, libffi, qemu-user. All programs need in principle the same stuff.00:07
poke53282systemd would be a candidate for such a lib ;)00:40
stekernpoke53282: but that would force you to use systemd02:36
stekernoh crap... already happened :(02:36
poke53282No, still using the busybox init tool02:52
poke53282I need systemd only for libudev02:53
poke53282an even there is a fork02:53
stekernpoke53282: I was more referring to the general state of things ;)02:54
poke53282gentoo is still systemd free. At least the last time I had it installed02:56
poke53282But yeah, systemd is everywhere.02:59
poke53282This will help to standardize a few things under Linux.03:00
poke53282But I understand the people who don't like it.03:09
poke53282For me it has more pro's than cons03:10
stekernI don't really see much pros with it03:10
stekern...and the loudest pro argument so far has been "faster booting times", who cares about that?03:11
stekernbooting is the least hot path in my computer usage at least, seems the wrong place to start to optimize03:13
poke53282one tool, for the whole config in user mode. very nice output if there is a problem. What I hate is, that the basic things in every distribution are at different positions. Every distribution has it's own wiki to do things. And everytime it is different.03:13
poke53282For example setting the time and language.03:13
poke53282and it's fast03:14
stekernwell, I rather have many choices, of which some are bad and some are good, than just one bad03:14
stekern...and don't give me "yes, but what if that choice was good, how about that?". Peoples opinions on what are good and bad differ03:15
stekernhmm, I can't seem to find a generic way to connect a i2s sound codec with a dma channel03:44
poke53282there are tons of examples in the sound/soc/ subfolders04:03
stekernyes, and none of them do what I want04:09
stekernor rather, a handful of them *almost* do what I want.04:49
stekernwith slightly different assumptions about the underlying hardware, instead of one generic04:53
poke53282Do you have implemented a  DMA device?05:55
stekernin hw, yes05:58
poke53282and a Linux driver?05:58
stekernbut that's just a detail, imagine that I have06:02
timgoh0Hi. I've built what I think is a baremetal toolchain for or1k off the openrisc github respositories. I am now trying to build the embecosm esp1 systemc soc binaries06:18
timgoh0I receive a series of Projects/soc/build/progs-or32/../../esp1-systemc-tlm/progs-or32/utils.c:70: undefined reference to `_GLOBAL_OFFSET_TABLE_'06:19
timgoh0From libtool.06:19
timgoh0I wonder if there's some global PIC compiler flag that causes this06:19
timgoh0Or if it's something else06:19
timgoh0Ah. Nevermind, found it06:21
timgoh0It's just badly designed makefiles06:21
poke53282I like the way to install a sysroot environment in a very short time06:39
poke53282What do you think if we should put something like this on the official website?06:40
stekernsounds like a good idea06:45
olofkWould anyone be able to take responsibility for this year's workshop at orconf?07:45
olofkIt would be awesome to have a workshop with the new multicore stuff, but there is nothing prepared right now, and I realize that it's not much time left07:47
olofkBut if someone wants to step up, I'll help out in any way I can07:47
olofkThe other option is to do a rerun of last years workshop. If we choose that option it would still be great if someone could go through the documentation and update things that has changed07:48
maxpalnHow well tested is the Endian switching in the mor1kx? it is desirable to use it in our project (the rest of the FPGA code is little-endian) but I'd like to know if I am setting myself up for a world of pain :-)08:40
olofkYou're still planning to run the CPU on big endian, right?08:44
stekernmaxpaln: it's not tested, since there's no support for switching endian09:02
stekerndepending on the application, but byte-swapping the buses is of course an option for integration into a LE system09:05
maxpalnok, thanks - I'll steer clear :-)09:16
maxpalnIt was just a discussion we were having. In reality the processor and the FPGA code connect via a single peripheral on the wishbone bus. It's easy enough to reverse the bit order at this stage to keep everything simple.09:17
hassI need help regarding the vhdl implementation of MIPS processor R1000 in vhdl15:27
hassor any other MIPS processor but should have instruction and data cache module15:28
hassany one their16:29
stekernyes, but the question is a bit misdirected in here16:44
stekernwe can give you verilog implementations of the openrisc architecture though16:44
hassactually i need in vhdl the i have got some from opencores but they didnt contain cache implemented16:46
hassstekern u there16:47
stekernthere's no vhdl implementations of openrisc on opencores afaik16:48
hassok i will try t get from some other source16:49
stekernthis is the only vhdl implementation I know of:
stekern...but you were asking for a MIPS processor though16:49
hassand mips has risc architecture16:51
stekernyes, but openrisc is not mips16:53
hassdo u have any idea about MIPS implementation with instruction and data cache17:12
hass_do u have any idea about MIPS implementation with instruction and data cache [13:12] <hass> @stekern17:15
stekernhass_: nope, sorry17:15
stekernmay I ask, why do you need a MIPS implementation?17:15
stekernand why does it need to be VHDL?17:16
hass_i am good in vhdl17:16
hass_its being a long time I didnt use verilog17:17
Hesham1hass_: You may want to check Plasma project here,plasma17:17
hass_thak shesham117:20
-!- Hesham1 is now known as hesham17:37
haasn_hi is there any one how know how to generate the binaries for this processor,minimips,overview19:09
haasn_it mentioned their from asmips but it didnt work19:09
stekernno idea19:19
mor1kx[mor1kx] skristiansson pushed 3 new commits to master:
mor1kxmor1kx/master f595e88 Stefan Kristiansson: bus_if_wb32: change module definition to verilog 2001 style20:19
mor1kxmor1kx/master df56e5b Stefan Kristiansson: bus_if_wb32: use upper case for parameters20:19
mor1kxmor1kx/master 9fce850 Stefan Wallentowitz: Multicore: Add core identifier...20:19
olofkAny other places we should spam? :)20:28
olofkWe are also namechecked in next edition of Elektroniktidningen (mostly relevant for the swedes here)20:32
olofkFrom what I can see, the additions made by Jungsook seem to be quite small actually. Would it be easier to just reimplement them?20:49
olofkOr just omit them? They all seem to be related to floating point. Could we do without that for now?20:54
stekernI think that could be an option, yes20:55
olofkblueCmd: You got any opinion on that?20:59
olofkI could try to just rip it out and see if it compiles.20:59
stekernhmm, something is not quite right with the ctrl changes... I've got regressions in my multicore soc20:59
olofkIf it doesn't, I'm lost20:59
blueCmdolofk: possibly, we will not able to emit floating point instructions in that case21:59
blueCmdolofk: oh, next ETN you said?22:01
blueCmdolofk: I got an invitiation from an ETN editor on linkedin which I denied, no introduction or anything22:02
--- Log closed Fri Sep 19 00:00:58 2014

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