IRC logs for #openrisc Tuesday, 2014-09-09

--- Log opened Tue Sep 09 00:00:44 2014
stekernpoke53281: a link you pasted some while ago got me interested in getting 8086tiny running on openrisc03:14
stekern...wow, that codebase must make a record in making assumptions about endianness03:15
stekernI might still go through with "porting" it to big-endian, just because of the challenge ;)03:16
poke53281I wrote it in the musl chat :)03:31
poke53281I hope you try the unobfuscated version.03:32
poke53281dosbox is maybe better.03:33
poke53281a whole x86 emulator in 4043 bytes. This is still so amazing. It runs DOS, Windows, and some games.03:35
poke53281I tried to understand the code. Now I understand it, but it's still amazing.03:35
poke53281Don't be surprised, but I have a Javascript version of 8ß86tiny.03:36
poke53281This was my way to understand the code.03:36
-!- Netsplit *.net <-> *.split quits: mboehnert03:38
-!- Netsplit *.net <-> *.split quits: _franck_, jonmasters, ams, rah, trevorman, knz, FreezingCold, fotis03:40
stekernpoke53281: =) does your version make as much assumptions?03:41
-!- Netsplit over, joins: mboehnert03:42
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poke53281Yes, I think so. But I had to get rid of all those defines03:44
poke53281Javascrpt is little endian03:48
stekernmmm03:55
stekernyou got rid of the defines, I add more of them ;)03:55
poke53281Javascript doesn't have a precompiler.03:57
stekernbasically all the *((int16_t *)&some_char_buff) needs to use wrappers that takes care of endianness and alignment03:58
stekernif done right, the wrappers could evaluate to a nop on targets that doesn't need them04:02
poke53281for my emulator the fastest way was to swap the 32-bit words. But this makes only sense, when all accesses are aligned.04:04
poke53281the preprocessor is implemented in a very interesting way.04:05
poke53281This OP is extremely powerful, but also hard to understand.04:05
poke53281the way, the emulator treats registers and ram in the same way is made by a genius.04:06
stekernbut all accesses aren't aligned04:12
poke53281Yes04:13
stekernhttps://github.com/adriancable/8086tiny/blob/master/8086tiny.c#L30804:13
stekernfor instance04:13
poke53281http://simulationcorner.net/8086tiny/8086tiny.html04:20
poke53281Does not work at the moment.04:20
poke53281Now I remember. Yes, I change all 16 Bit accesses to return mem[offset] | (mem[offset+1]<<8);04:24
stekernpoke53281: since you've dissected the macros, maybe you can help me see what I'm missing here05:30
stekernwhy aren't these equivalent?: http://pastie.org/953808505:30
stekernthe place in the original code is here: https://github.com/adriancable/8086tiny/blob/master/8086tiny.c#L13105:30
stekernah, the cast to (unsigned short)... maybe...05:31
poke53281:) The macros are kind of obfuscated. Each tiny little bit is important here.05:34
poke53281http://pastie.org/953810305:37
poke53281this are the unobfuscated versions05:37
stekernI don't see how the 'obfuscated' version becomes regs16[REG_SP] -= 205:41
poke53281hehe05:42
poke53281I think the variable is too times subtracted by one05:42
poke53281at two different positions. Because you use the variable two times05:42
poke53281"dest" is used two times in the macro05:45
poke53281http://pastie.org/953811705:48
stekernah, in the R_M_OP macro05:48
poke53281yes05:48
poke53281It's crazy efficient written.05:48
stekerncrazy, at least ;)05:49
poke53281These macros can be used for registers as well.05:50
poke53281but registers are just as fixed memory positions05:50
poke53281the first 8086 had 29000 transistors.  That means, that even the ISA of the x86 must have some inherent logic to build such a complex ISA with 29000 transistors05:52
poke53281And yes, there is some.05:53
poke53281Not nice, but at least some logic.05:53
stekernpoke53281: this is what I've come up with from your function: http://pastie.org/953825207:11
stekernat least it still works on x86_6407:11
stekernI think it *might* be endian agnostic now07:11
stekernthe CAST(unsigned short) might need changing still07:12
stekernthe problem is that he makes advantage of how macros work and do things like #define M(x) CAST(unsigned short)x07:13
stekernand then use M like this: M(reg + 1 + 2 + 5)07:13
stekernwhich then evaluates to: *(unsigned short *)&reg + 1 + 2 + 507:15
stekerni.e. M((reg + 1 + 2 + 5))) would evaluate a completely different result07:17
sb0is the PreserveAll LLVM calling convention correctly implemented for or1k, and what does it do?08:13
sb0is there a calling convention with no callee-save registers, that can be used to implement low-overhead collaborative multithreading?08:18
sb0hmm seems PreserveAll is actually the opposite of what I want08:19
-!- rah_ is now known as rah09:03
-!- Netsplit *.net <-> *.split quits: f3ddischson, mboehnert212:01
-!- Netsplit over, joins: f3ddischson, mboehnert212:05
lauriOlof is here?12:21
ysionneauhe is olofk12:21
lauriNice job with the presentation @ FPGAworld 2k1412:21
lauriolofk: The guy with Debian T-shirt here ;)12:22
edward__hi12:57
edward__i'm trying to follow this http://opencores.org/or1k/ORCONF2013_Workshop_ORPSoC_On_DE0_Nano12:57
edward__I can get up to having openocd connect to or1k and I can even load a binary, but nothing else happens12:58
stekernedward__: which binary? (to know what is expected to happen)13:01
stekernif you don't get uart output, try a led-blinker or something13:02
edward__stekern: yep I tried the led-blinker binary on the page13:03
edward__stekern: " timerled program, download it here: "13:03
stekernok, and that doesn't work.. then it's trickier13:04
edward__I also tried to build a fresh softcore image from https://github.com/openrisc/orpsoc-cores.git without any patches and no such luck13:05
stekerndid you try with the pre-built fpga image?13:06
edward__that was the first thing I tried13:06
stekernok, "good"13:07
edward__is that the newest repo?13:09
edward__i've seen git://openrisc.net/stefan/orpsoc around also13:09
stekernthat's old13:11
edward__yep looks like it ok13:12
stekernyou can try this: http://www.elec4fun.fr/downloads/led_blink.elf13:12
edward__so yea, github.com/openrisc/orpsoc-cores should just work right13:12
edward__ok 1sec13:12
stekernand load it with this: https://github.com/openrisc/or1k-tcltools13:12
edward__stekern: ok that seemed to download fine but nothing is happening13:16
edward__Loading section      .text, size 0x0000015c lma 0x00000000 (100%)13:17
stekernhmm, something seems to be terribly wrong13:17
edward__once I downloaded with that script do I need to do anything else?13:17
stekernno, it should run the binary (which should blink the leds)13:18
edward__:<13:18
edward__does quartus II do any sort of board diags?13:19
stekernis this a brand new board? and have you tested other designs on it?13:19
edward__i've done simple things like a binary counter on it and it works fine13:20
stekernat this point I can't guess anything but that your board would be broken, or it's a new revision that's slightly different (SDRAM timings come to mind)13:21
stekernthe prebuilt image has been known to work on several different boards, so it should be "good"13:22
stekerns/boards/de0 nano boards13:23
stekernif you go back to openocd13:23
edward__yep binary counter still works13:24
edward__let me just reflash with or1k13:24
stekernload the program and then do: mdw 0x10013:24
edward__the led_blink.elf ?13:25
stekernyou can go back to the timer program13:26
stekernwe just want to load the memory with something known and see if we can read it back with openocd13:26
edward__> halt; mdw 0x10013:27
edward__target state: halted13:27
edward__0x00000100: 1800000013:27
stekernok, that looks good13:28
stekernyou can confirm that it's what is in the program by; or1k-elf-objdump -D program13:28
edward__hmm yes true but I need to get binutils compiled for this target, also I need to understand the memory map for it13:29
stekern0x100 is the reset vector13:30
edward__ah ok13:30
stekernbut I can tell you that 18000000 == l.movhi r0,0x0, which is what you'd expect as the first instruction13:31
stekernso that looks good...13:31
stekernwhat happens if you do:13:32
stekernmwb 0x91000000 0xff13:32
stekernmwb 0x91000001 0xff13:32
edward__all the leds light up13:33
stekern\o/ ... but :( that the program doesn't seem to run...13:33
edward__I'm at a loss13:39
edward__stekern: do those tcl scripts you linked me to put the program in non-volitile storage?13:40
stekernno, it loads it into SDRAM13:42
edward__takes a really long time to flash the linux image, I presume because its SPI13:42
edward__oh really!?13:42
edward__why is it slower than openocd?13:43
edward__I noticed it invocates quartus_stp13:43
stekernyes, it's not the most efficient way. I just wanted to try that to exclude any problems with openocd13:46
edward__understood13:46
edward__stekern: ever seen anyone with this kind of issue before?13:58
stekernnot that I can remember14:01
edward__stekern: so now I am wondering.. what board I should buy..14:06
edward__I wish the core was written in VHDL :/14:08
edward__stekern: do you happen to have NiosII images about with a working kernel? maybe see if that would work?14:14
stekernedward__: sorry, haven't ever tried NiosII on that board14:26
stekernbut, it's weird, so far everything has indicated that it works like it should14:28
stekernexcept actually running the programs14:28
_franck_edward__: remove your finger from the reset button ! ;)14:30
stekernheh14:30
stekernwell, that you can actually try. load the mem and then press the reset button14:30
edward__stekern: yep I tried that and even thought of the idea that maybe the button was broken ;)14:32
edward__what about these dip switches, they are currently all down14:33
_franck_what if you do mdw 0x100 64 ? To see other memory words (may be only 0x100 is valid)14:34
edward__https://gist.github.com/anonymous/216d7082fc577ef8072914:37
edward__this is with the timerled program14:37
_franck_looks good14:40
stekernactually, that timerled program doesn't seem to do anything on my board neither now...14:40
stekernbitrot! ;)14:40
stekernah, now it works, after a 'reset'14:41
edward__stekern: does timerled give any serial output also?14:57
stekernnot sure, I don't think it does15:05
edward__do you happen to have some simple program around to write some junk to the uart?15:06
stekernhttp://oompa.chokladfabriken.org/openrisc/hello_world15:08
edward__great thanks!15:09
edward__I give up, ram *must* be screwed15:22
olofklauri: Thanks :)15:37
olofkstekern: You needed something that could push data from wishbone to a fifo interface, right?16:14
olofkDoes it matter for your application if the core is a master that can pull data from a memory area by itself?16:15
olofkBecause I'm having some new prioritites in the project I'm working on and will implement that now16:15
stekernolofk: hmmm... to be precise, I need something that I can hook up to this: https://github.com/skristiansson/i2s/blob/master/rtl/verilog/i2s_tx.v16:29
stekernso, what you describe sounds like something I can use16:30
stekernbasically, I need to read out data on each edge of lrclk16:31
olofkHmm.. you should be able to use the existing stuff for that I think16:41
olofkThe wb_stream_writer that I just renamed to wb_stream_reader16:42
olofkor wait a minute. Whih side is connected to the pins, and which is supposed to connect to the wishbone side?16:48
stekernleft_chan/right_chan should be connected to a fifo, and lrclk edges are fifo read enable16:50
stekernbut, then there's this too: https://github.com/skristiansson/i2s/blob/master/rtl/verilog/i2s_rx.v16:50
stekernwhich should be connected to the write-side of a fifo16:51
stekernbut I'm mostly interested in the tx initially16:51
olofkRight. That's the part that I haven't implemented yet, but will start with now16:53
olofkSo how about this.. config regs for an enable flag, start address, buffer size and an interrupt to tell when all data has been read16:59
olofkLater on we can add configurable burst size and read/write pointer17:00
olofks17:01
poke53281stekern: Did you test the code on openrisc17:16
stekernpoke53281: it doesn't work yet17:16
poke53281the cast is important in other parts of the code. Push is relatively harmless17:17
stekernbut there's a lot of other places that need fixing as well17:17
stekernyes, I know. I have fixed most of them17:17
stekernbut some are hard to fix due to the nature of the macro17:18
poke53281You, know what I do. In the working version After every instruction I write a into a file a register values. In the other version I load them and compare.17:20
stekernI mean, hard to fix by just exchanging the macro with a wrapper17:20
poke53281I write the content of the registers (and more) into a file and then compare it with the other version. The file could easily have a size of several GB.17:24
poke53281Otherwise it is very hard to find the subtle errors.17:25
stekernmmm17:26
poke53281Here it makes also sense to write op_result, op_src and op_dest in the file17:37
poke53281stekern: My next project is to make Elite Frontier working on openrisc. One good soul already wrote a Atari-ST assembler converter to C for this game. http://tom.noflag.org.uk/glfrontier.html18:08
poke53281This was one of my favorite games underDOS18:08
poke53281At least. Big endian to big endian :)18:09
stekern=)18:34
olofkYes! Elite II :)20:21
olofkhmm... is wb_ram working at all? Simulations don't look very good20:22
olofkah.. my bad21:28
olofkstekern: I have implemented the initial part of the stream writer stuff now together with a test bench21:48
--- Log closed Wed Sep 10 00:00:45 2014

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