IRC logs for #openrisc Thursday, 2014-05-08

--- Log opened Thu May 08 00:00:39 2014
stekernnote to self - we should probably do something like this in gdb: https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commit;h=9404b58f46328b3b171b0d5eeb0691bd685bc4f505:31
stekernblueCmd: https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commit;h=999b995ddc4a8a2f146ebf9a46c9924c6a7c65a606:18
pgavinI like the new or1k-tests suite07:04
pgavinperhaps we should integrate it into the or1ksim tree?07:04
pgavinI guess separate is ok... but it would be cool to distribute it07:04
pgavincould be kept in sync with git-subtree07:05
stekernpgavin: my idea is to pull in the or1ksim testsuite + your m4 based stuff07:05
pgavinhah, really?07:05
pgavincool :)07:05
pgavinI added a few more tests07:05
pgavinbut it still doesn't have very good coverage IMO07:06
stekernhence the 'native' name of the tests that are "dumped 'natively' into the or1k-tests repo"07:06
pgavinok07:06
pgavinI'm ok with deprecating the old tree and just merging07:06
pgavinbtw07:06
pgavinsince AFAIK I'm the only one using it07:07
stekernok, that works for me too07:07
stekernor1ksim is probably best to keep 'external' though07:07
pgavinwhat I had in mind was (something I'm doing now) is making modifications to the testsuite tree, then pulling them into my project using git subtree.  it means I can reuse the test framework for implementation specific tests  without polluting the main testsuite07:10
pgavinbut I suppose or1ksim doesn't have anything "implementation specific"07:10
pgavinexcept the l.nop hacks :)07:10
stekernyeah, I don't think it does07:11
stekern..but, I think in or1k-tests, it could be fine to dump implementation specific tests in there too07:11
pgavinok07:12
pgavinoh.  so, I was looking at some of the code gcc produces07:12
pgavinand I saw quite a few load-uses that could be pushed after another instruction07:12
stekernin the current proof-of-concept, my idea was that you compile implementation-specific test-lists, and then use those to test different implementations07:13
pgavinsince a load-use immediately after the load often causes a bubble, I was going to look into fixing that07:13
pgavinah, ok07:13
pgavinI like the tests list idea07:13
stekern(load/bubble) ok, cool. another thing that would be interesting to look at (and that I have been meaning to do some time), would be to move the l.sfxxx's when possible07:14
pgavinI figure gcc should be able to do all that stuff automatically, we just have to figure out how07:14
pgavingive it more info about dependencies and cycle times I guess07:15
pgavinwell, scratch that, it should already know pretty well about dependencies07:15
pgavindoes the mor1kx also have a bubble in that case?07:15
stekernnot anymore, now it branch predicts instead. but it would be possible to solve the critical path from l.sfxxx with a bubble and let the compiler be smart about it instead07:17
pgavinok07:17
pgavinI haven't tested the timing but my core forwards the f flag, so there's no bubble07:18
pgavinI hope it's not too tight :)07:18
stekern(and, if the compiler *is* smart enough about it, it might make sense to weight in the current flag to the branch prediction)07:18
pgavinhmm.  you mean sending the current f value to the branch predictor along with the PC?07:19
stekernyes, which would be the 'old stored' value07:20
pgavininteresting idea.  wouldn't you need to track whether the branch is bf or bnf to make use of it?07:20
pgavinright07:20
stekernah, well, I need to in the current branch predictor too. It's a simple static forward-branches not taken, backwards taken predictor.07:21
pgavinok07:22
stekernanyways, I pushed this yesterday, which kinda reverts one of your old commits: https://github.com/openrisc/or1k-gcc/commit/bdd3ad496930c61218ea683b9fd3dbcc093b9a1407:22
stekerndo you think you could take it for a ride with the nd implementations?07:22
pgavinsure07:23
pgavinthanks for doing that :)07:23
pgavinI didn't think about PIC when I did that07:24
stekernI got tired explaining to people why we can't compile the Linux kernel with the or1k-linux- toolchains. So, now we can ;)07:24
pgavinI just looked at the code GCC generated and it looked pretty well07:24
pgavinlol :)07:24
stekernyeah, I wouldn't have bothered changing your stuff if our Linux port wouldn't link with libgcc.a07:25
pgavinis there a way to use the -linux toolchain with newlib?07:26
pgavinthat would mean I don't have to keep both around :)07:26
pgavinI don't think I've even tried it though07:26
stekernmaybe there is, but I guess nothing will work 'out-of-the-box', since a lot of flags and stuff are assumed according to which toolchain is used07:31
pgavinyeah, that's what I was thinking07:32
olofkpgavin: Are you interested in joining us at the OpenRISC conference in Munich (probably October 11-12)?07:58
pgavinI'm interested08:00
pgavinbut I'm in a weird stop right now08:00
pgavinI'm supposed to graduate in ~4 months and I don't know where I'm going to work08:00
pgavinso I guess I won't know until right beforehand08:00
pgavinspeaking of which... anyone know of any openrisc companies that are hiring? :)08:01
olofkpgavin: Yeah, I can understand that. Just realized that I had forgotten to add you to a mail that I sent08:02
pgavinI think I received one through a list at one point08:03
olofkpgavin: I think unfortunately that everyone in here is looking for an OpenRISC company that is hiring :)08:03
pgavinlol08:03
pgavinlets just start one08:03
pgavinput it on kickstarter08:04
olofkOhh that's a great idea!08:04
pgavinit's risky08:05
olofkOr we could ask the OpenCores maintainers to crowdfund an ASIC08:05
pgavinbut I think it could be fun08:05
pgavinI was thinking a rasperry-pi like board based on openrisc08:06
pgavinwith all opencores based chips08:06
olofkpgavin: But if you're thinking about returning to Gothenburg, I'm sure that the company I'm working for will be interested in someone with your skills. We try to only hire the best people and have a lot of people with PhD in different areas08:10
pgavinare you working at gaisler?08:11
olofkpgavin: No. Qamcom Research & Technology. But we have recently hired some guys from Gaisler08:12
pgavinok08:12
pgavinI really really liked gothenburg08:13
olofkBecause of the weather? :)08:13
pgavinI suppose :)08:13
pgavinI have family in ulricehamn too08:13
pgavinbut my fiancee I think would prefer a slightly warmer climate lol08:13
pgavinshe's a horse trainer and works outside08:14
olofkTotally understandable :)08:14
pgavinI considered looking at what was available in sophia antipolis, but that means she has to learn french.  it's a bit easier to get away with only knowing english in sweden, and just picking up swedish over time08:16
pgavinbut not possible in france :)08:16
olofkAnyway, you have my e-mail address, so if you would like to know more, just give me a mail08:16
jeremy_bennettpgavin: I like the Kickstarter idea. But what would make it distinctive.08:16
pgavinok. thanks, I'll keep it in mind08:16
jeremy_bennettI think it's hard to make an ASIC in those volumes at a price that works for Kickstarter/Raspberry Pi08:17
olofkYes. We're quite anglophilic here :)08:17
pgavinjeremy_bennett: just play up the hard-coded back doors that are possible in closed designs :)08:17
pgavinjeremy_bennett: ok08:17
pgavinI know nothing about fab volumes and costs08:17
jeremy_bennettIs that enough to persuade backers. I quite like the idea of an FPGA board, but more like mbed, so better for control purposes (and with the advantages you highlight).08:18
jeremy_bennettOne weakness of the Raspberry Pi is that it is all 3.3V and no protection. So it is very easy for a school kid to break it. So everyone has to pay extra for an I2C interface board.08:19
olofkIf we want an ASIC, we could talk to Richard Herveille perhaps and see if easic can help us. Their process is probably a lot more affordable than a full custom ASIC08:19
jeremy_bennettOne of the strengths by comparison of Arduino is that if you wire everything up wrong, generally the chip does not break!08:19
olofkjeremy_bennett: And another thing is that with an FPGA we can offer 20 i2c ports and 35 SPI ports if we want08:20
jeremy_bennettSo if you could make an FPGA OpenRISC mbed, with decent protection on the signals that would be a generically very attractive product.08:20
olofkHas anyone looked at Arduissimo? He started his kickstart campaign on indiegogo just a few days ago08:20
jeremy_bennettEven for non-OpenRISC people.08:21
jeremy_bennettolofk: Good idea about asking Richard08:21
olofkjeremy_bennett: I'm also intersted in the other side of the spectrum. A high-performance FPGA with high speed I/O so we acn properly do things like DVI/HDMI, USB2/3, SATA, PCI Express. The Open Source IP is falling behind in the fast I/O area08:22
olofkAnd I think that would attract a lot of people, since roughly 50% of everyone coming in here is looking for some sort of Open Source computer08:22
olofkI mean, it would be enough to clock the thing at 200MHz (I got mor1kx running at that speed in a Virtex-6 device)08:23
olofkwithout caches, but it's probably optimizable08:23
olofkjeremy_bennett: Isn't there already a lot of low-end FPGA boards out there, like de0_nano and papilio one? Are you looking at lowering the costs more than those, or are you specifiaclly looking for the I/O protection?08:25
pgavinolofk: what is the memory access latency like without caches?08:25
olofkpgavin: Depends very much on the memory technology, but with DDR2, I'd say about 40-50 cycles08:29
olofkOn the first access08:29
pgavinok.  so it bursts08:29
olofkThose thigns like to be read block-wise08:29
pgavinright08:29
olofkAnd the trend will probably be trading latency for higher bandwidth. High speed serial memories are starting to appear now08:30
pgavinwell even if the caches reduce the clock rate by half they'll probably be beneficial08:30
stekern(competing with el-chepo fpga-boards) darn hard to do, given that a lot of the cheapness come from them being sponsored08:30
olofkstekern: I agree08:30
olofkI think the ordb2a was sold at basically self-cost, and that was ~€14008:31
olofkSame FPGA as the de0 nano, but with onboard ethernet and a USB connector08:31
pgavinhas anyone ported to the de2-115 yet?08:33
olofkpgavin: https://github.com/openrisc/orpsoc-cores/pull/3808:33
olofkoh.. sorry. That was a DE2-7008:34
pgavinwell08:34
pgavinI have one, I can try it out08:34
pgavinwill be good practice08:34
jeremy_bennettolofk: It would be good to pull the costs lower. The DE0-Nano costs around $80-90, yet Adapteva can put a Zync and an Epiphany on a $99 board.08:34
jeremy_bennettSo I think you could build an FPGA board capable of running OpenRISC for < $50.08:35
olofkI would like a board with high speed I/O (like I mentioned above) and the baddest FPGA that the free tools support08:35
stekernyeah, me too08:35
olofkjeremy_bennett: You're probably right that we could cut costs a bit more, but I'm not sure that the Zync is all that expensive otoh.08:36
stekernjeremy_bennett: sure, you probably could. but it would most likely be at self-cost or even making loss prices.08:36
olofkAnd I'm not sure that Adapteva finished on the plus side with that prices08:36
stekernI mean, the parallella had other agendas than making profit from that board, right?08:37
jeremy_bennettBut I think making it specifically a microcontroller type board with good protection (so like mbed, but with good protection) would be a valuable proposition.08:37
jeremy_bennettYou really need a low-cost design & manufacturing expert to do it.08:37
jeremy_bennettThe other thing would be to get a good dev environment to go with it. The reason mbed works is the comprehensive programming and library environment.08:37
stekern...which of course we would have as well, make OpenRISC wide-spread... but you get my point08:37
olofkHow much is an mbed?08:38
jeremy_bennettolofk: Around $40 - its a Cortex M0 or M3 (two flavours)08:38
jeremy_bennettstekern: Fair point08:39
olofkjeremy_bennett: Have you considered the papilio one? Sounds like it's in the right price and hardware range08:41
olofkhttp://papilio.cc/index.php?n=Papilio.Buy08:41
olofkHaven't explicitly looked for I/O protection though, and I'm not sure what the SW infrastructure looks like08:42
olofkAnd apparently Rob Riglar (the AltOR32 guy) has ported his CPU to the papilio 250k08:43
olofkSo if we're going for a Xilinx FPGA I suggest a Virtex-6 (XC6VLX75T), Kintex-7 (XC7K160T) or Artix-7 (XC7A200T). All have plenty of Multi Gigabit tranceivers and are supported by webpack09:00
olofkI'm not as familiar with Altera's options, but they should probably have something similar09:01
stekernolofk: did you make any progress with or1k-lsu and or1200 yesterday?09:28
olofkstekern: Nope. I tried to read through the div code, but couldn't find anything obvious. It's confirmed to be in the serial divider at least09:37
olofkBut isn't that the default one? Sounds weird that no one has noticed09:37
olofkOh. and I added craploads of nops between each instruction in the testcase, but that made no difference09:38
olofkwallento: How scalable is this multicore thingamob? Is there any added complexity going from two to three cores?09:38
olofkjuliusb: What can you tell us about the or1200 divider? Any known issues?09:43
olofkah yes. I thing I could confirm that the div gets the correct nominator and denominator (is that what they are called? The numbers above and below the line)09:44
olofkTäljare och nämnare09:45
stekernisn't it numerator/denominator09:51
olofkYou're probably right. I thought something sounded off with nominator09:52
olofkStupid hardware divider. I can't remember how those things are supposed to work. We should have offloaded heavy calculations to the cloud instead09:53
stekernthey should just be called "above and below operators", why have fancy words for stuff?09:54
stekernI've always had troubles with the "fancy words" and using right terminology09:56
olofkFancy words are for dumb people09:57
stekernas my first steps in mcu programming I implemented something I called "blinking with a led at different intervals to make it glow with different intensity" and at the same time claiming I didn't know how to implement fancy stuff like PWM ;)09:57
rahhttp://www.easic.com/low-cost-power-fpga-nre-asic-90nm-easic-nextreme/easic-nextreme-overview/09:57
olofkhaha09:57
rah790 I/Os09:58
rahphwoar09:58
olofkrah: Not laughing at your easic ;)09:58
rah:-)09:58
rahI'm glad to hear that :-)09:59
rahhttp://www.easic.com/Spatr7ve/website-wp1/wp-content/uploads/2011/07/Managing-Risk-and-Cost-Nextreme-NEW-ASIC-to-Standard-Cell-ASIC-Migration-v056.jpg09:59
olofkApparently Altera dropped their Hard Copy program (I heard it wasn't beneficial for them) so easic is the only company I know of now in the cheap almost-ASIC market09:59
olofkrah: Hmm... most things look good, but I'm missing some multi gigabit transceievers10:02
olofk800MHz LVDS is the fastest I could see10:02
olofkShould probably check for external transceivers though. Might be a better idea10:02
raholofk: what do you need multi gigabit tranceivers for, just out of curiosity?10:06
olofkrah: usb, sata, pci express, hdmi/dvi10:10
rahI see10:10
olofkwell, usb2 would probably work, and low resolution hdmi10:11
rahthey have numbers there of "1-10K" units10:13
rahI wonder how much it would cost to produce 1000 orpsocs using their "NEW ASIC"10:14
olofkI'm interested in that too. Problem is that it's probably pretty hard to get a quote10:15
rahaye10:15
rahhttps://bitcointalk.org/index.php?topic=68682.010:16
rahit doesn't look good10:16
rah"including the tool chain, you are looking at approximately $3000 or $4000 per chip"10:16
rahouch10:17
olofkWhat quantities?10:18
rahvery low; 45 chips10:18
raha handful10:18
stekernthat sounds pretty cheap10:19
rahO_o10:20
rahI'm one of the 50% of people who come in here looking for an Open Source computer and there's no way I could spend $4000 on just the chip10:23
rahor $300010:24
olofkThat sounds very cheap10:24
olofkThat's $135000-18000010:25
pgavinso we get 50 people with $3000 each :b10:25
pgavinbut you still gotta build the board10:26
pgavinwhat would that cost10:26
olofk...ok very cheap might be exaggerating :)10:26
olofkpgavin: I say board and chip are two different things10:27
olofkThe idea with ORSoC's ordb2a board was to make an FPGA board that could be populated with an ASIC later on10:27
pgavinah10:27
LoneTecha lot of jumbled text there. is that for a 90nm structured asic? if it's not an urgent one-off I'd think a mosis process design using electric would be more attractive10:27
olofkI think we can forget phase two10:27
pgavinbut you need to make the chip socketable then?10:27
olofkpgavin: No, but you can reuse most of the PCB design10:28
pgavinok10:28
pgavinso you'd still sell the chip and the board together already assembled10:28
olofkI guess so. But with the option to buy stand-alone chips10:29
pgavinbut would an individual want to buy a single chip?  doesn't the soldering need to be automated?10:30
olofkI think that the market for those things won't be companies who buy ASICs and put them on their own board10:30
olofkExactly10:30
olofkHaving the option won't hurt, but I'm not sure it's a good sell. You would probably be much better of with a cheap-ass ARM SoC in that case10:30
olofkI think board first, ASIC later is the way to go10:31
olofkboard with FPGA I mean10:31
LoneTechspeaking of cheap-ass, the psoc chips have really moved into that region10:31
olofkLoneTech: Do you mean the Cypress psoc, or programmable SoCs in general?10:31
LoneTechcypress10:32
olofkYeah. They look very interesting, but I haven't had the opportunity to look closer at them10:32
rahhttp://www.easic.com/Spatr7ve/website-wp1/wp-content/uploads/2011/02/eASIC-Nextreme-Product-Brief.pdf10:32
LoneTechthe sad part is that the reroutable section only has windows tools10:32
rahthey only do TQFP and *BGA packages for the chips10:33
olofkLoneTech: What? In 2014? How come some companies never learn?10:33
olofkI'll be all for looking at crowdfunding a high-end FPGA board. Anyone else interested? :)10:35
raholofk: yes :-)10:35
LoneTecha bit interested, but honestly I think the Parallella could keep me occupied on that front for a while10:36
olofkLoneTech: Me too probably. I have more boards than I have time to play with10:36
LoneTechit's a crowdfunded $99 Zynq board, with a crazy powerful parallel processor added on (which it was designed to showcase, but hey, cheap zynq!)10:36
olofkBut they all miss high-speed transceivers10:36
LoneTechwhat level of high speed? it certainly has >Gb10:37
olofkLoneTech: Yes. I bought it partly for the Zync as well :)10:37
olofkLoneTech: Are you sure about that?10:37
rahhow can you reuse an FPGA board with an ASIC?10:38
olofkThe Samtec connectors are only a few hundred Mb/s, right?10:38
rahsurely you'd have to at least move the pads for the chip?10:38
rahunless they come in identical packages?10:38
olofkrah: You redesign the parts closest the the FPGA.10:38
rahok10:38
rahso it'll still require some adjustments10:39
LoneTechhm. the feature table for the zynq indicates this one doesn't have the transceivers10:39
rahhigh-end FPGA board with high-speed transceivers, intended to be reused with an ASIC OpenRISC chip, I'm in! :-)10:40
LoneTechand confusing numbers too (suggesting 1.5Gbps transceivers)10:40
raholofk: get on it! :-)10:40
LoneTechif I recall correctly, and I might have been wrong, even lacking that block it can do some silly speeds.. but the connector might set the limits10:41
olofkLoneTech: The LVDS I/O are pretty fast, but I don't think they're >Gb/a10:49
olofkrah: I can make a wish list and we leave the PCB designing to someone else10:51
olofkah.. Gb/s I mean.10:51
LoneTechright. looking. first thing is that there are serdeses in the new selectio blocks, even when they're not named gigabit transceiver10:52
LoneTechokay, the slowest speed grade can do 950Mb/s (table 49, Zinq Z-7020 DC/AC switching characteristics)10:54
olofkLoneTech: Wow. That's still pretty fast10:54
LoneTechso I was off, but it's still rather impressive compared to other generations10:54
raholofk: that would be a start10:54
raholofk: put it on the wiki with a call for PCB designers?10:55
LoneTechdocument DS18710:55
olofkThe should have pushed it 50Mb/s faster and the could have called it a Gigabit tranceiver :)10:55
LoneTechactually, the higher speed grades (-2, -3) do 125010:55
olofkLoneTech: Which speed grade is on the parallella?10:55
LoneTech1C, so it's the slower kind per spec10:56
* rah wonders again if an EE degree might have been better than CS10:58
rahoh well10:58
LoneTechfor comparison, the GTP transceivers we don't get do 3.75Gb/s on this speed grade, 6.25 on the faster one10:58
olofkrah: I started out in CS and took as many EE courses as I could, and then switched to EE and took as many CS courses as I could. This is probably somewhere in between :)10:59
rahhah :-)11:00
raholofk: I was hard core and took only CS course, including for free modules where I could take any course offered by the university11:01
rahin retrospect, some EE courses might have been a better choice :-)11:01
-!- Netsplit *.net <-> *.split quits: chad__11:23
-!- Netsplit *.net <-> *.split quits: hno`12:04
LoneTechfwiw, the parallella manual states the PEC_FPGA connector can support 22.8Gbps (which works out to 950Mbps in 24 pairs)12:05
LoneTechthe connector is rated for much higher speeds12:09
-!- Netsplit over, joins: hno`12:18
blueCmdstekern: woo! was it scary to do the git push? ;)16:32
stekernblueCmd: a little ;)17:01
stekernbut there's a 'git sucks' commit in there that adds a missing file. that made it a lot less scary17:02
mohessaidhello, I found something out, I tried to compile a simple hello world program with all the toolchains and I find that niether the uClibc nor the glibc  toolchain can produce a program that run on openrisc. the result of both toolchains print this message in linux (in simulation) /bin/sh: hello : not found. and the only toolchain that produce a running program is the prefixed by or32-linux- built from gnu-stable trunk. of course 18:11
mohessaidof course I mean the or1k-uClibc and or1k-linux-gnu18:12
mohessaidwhat do you think the problem is?18:13
stekernah, parallella board arrived now18:15
stekernmohessaid: where's your ld.so?18:17
mohessaidld  ?18:18
stekernyes, it should be /lib/ld.so.1 with glibc18:19
stekernand /lib/ld-uClibc.so.0 in uClibc18:21
stekern(which is a symlink to the actual file)18:21
daliasand once the musl port is done, /lib/ld-musl-or1k.so.1 (or whatever the $ARCH you prefer ends up being :)18:22
stekerndalias: =)18:24
stekerndalias: have there been any more discussion about the deprecated syscalls btw?18:26
daliasnot much. some quick checks seemed to suggest open is the only one that needs nontrivial handling (because SYS_open is used directly in several places)18:28
daliasthe rest can probably just be #ifdef SYS_oldwhatever / use it / #else / emulate with new / #endif18:29
daliassince they're only used in one place, emulating the corresponding syscall wrapper18:29
daliaserm18:29
daliasimplementing18:29
daliasmy brain si fried today18:29
stekernthat, and SYS_poll in __init_libc18:30
mohessaidthis is my ld.so.1 http://goo.gl/PgqCNT18:33
stekernmohessaid: I asked where it was (i.e. do you have it on your rootfs)18:34
mohessaidit is under /opt/openrisc-devel/or1k-linux-gnu/sys-root/lib18:36
stekernok, you need to have it on your rootfs18:37
stekern(or link your application statically)18:37
_franck_mohessaid: you can also compile your program with --static18:39
mohessaidstekern: what do you say about the ld.so.l18:44
stekernmohessaid: that you need to have it on your rootfs, do you?18:56
blueCmdmake install_root=/my/nice/initramfs install19:07
blueCmdIIRC19:07
daliasstekern, yes19:32
olofkstekern, blueCmd : I'm writing a few lines about the atomic operations now. How did it work before? I mean, we supported threads before this, right? Or is that unrelated?19:39
stekernolofk: first, where are you writing those lines you are constantly referring to?19:40
stekernto answer the question, it was handled by issuing a (or1k specific) syscall from userspace19:41
olofkstekern: My blog (think something like kernelnewbies.org/LinuxChanges)19:41
stekernheh, it took a year for the parallella to arrive, I still wasn't prepared for it (I'm missing micro-hdmi and micro-sdcard)19:43
olofkhaha19:45
olofkstekern, blueCmd: You got mail19:45
olofkI should probably contact DHL tomorrow. They tried to deliver monday, but I haven't got a mail, SMS, a note or anything to indicate what they will do next19:45
stekernthat's the normal DHL style...19:46
olofkSo what's the normal way to handle it?19:47
stekernthey seem to have realised that it's not working here, so they let the normal post carrier do the delivery19:47
stekernwhich meant I had to go pick it up at the "post-office", but that's better than going out to the DHL office by the airport19:48
olofkI'm ok with picking it up at my post-office... as long as they give me a fucking recipe I can use to pick it up19:49
olofks/recipe/receipt19:49
stekernusually they drop a note in your mailbox that says "we tried to deliver a package to you, please contact us so we can arrange a time that suits both of us for us to deliver it to you (or pick it up from our office)"19:50
stekernthe only problem I have experienced is that the "arrange a time that suits both of us" actually just means "a time that suits us"19:51
olofkMm.. but it looks like they didn't. One problem is that I've moved since I ordered the board almost two years ago. So I'm not sure if they have tried to drop it at my old apartment19:52
olofkOh well. I'll find out tomorrow19:52
blueCmdolofk: as stekern said: system call that disabled interrupts, did the thing and returned to user space19:53
blueCmdI think "ls" did about 10k of those on a normal run19:53
blueCmdit was _quite_ slow, but worked19:53
olofkInteresting. Can you provide some more estimates on the number of instructions required before and after... if that's deterministicish20:00
blueCmdolofk: number 1 is that it doesn't require the context switch to kernel mode and interrupts to be disabled20:01
blueCmdand that passing an invalid pointer doesn't crash the kernel, but that's just lazyness :)20:02
olofkAs long as we can just set the supervisor bit from user mode, I don't think that's a very big deal :)20:03
blueCmdolofk: you can ask stekern to do 'strace ls 2>&1 | grep or1k_atomic -c' and with '... | grep or1k_atomic -v -c' for the latest numbers20:03
olofkstekern: Can you do 'strace ls 2>&1 | grep  or1k_atomic -c' and with '... | grep or1k_atomic -v -c' for  the latest numbers20:03
olofk?20:03
blueCmdI was like 'that's very close to what I wrote!'20:04
blueCmdolofk: I forgot how l.sys works, maybe it's low overhead20:05
olofk:)20:05
olofkIs this a pure linux thing, or is it in gcc/binutils as well?20:06
blueCmdit's not in binutils, it's currently not in gcc (but will be,http://gcc.gnu.org/onlinedocs/gcc-4.1.2/gcc/Atomic-Builtins.html)20:07
blueCmdit is in glibc20:07
olofkaha. So it needs to go into the other C libraries as well if we want to use other C libs? Or is the plan to move them to GCC?20:09
blueCmdolofk: yes, it needs to be in other libcs20:10
blueCmdunless you want them to depend on gcc specific extensions20:10
blueCmdfor glibc that's fine, but for musl not so much20:10
blueCmdand for uClibc I don't think anyone cares about atomic operations (I don't think it has any currently)20:11
olofkah ok20:12
olofkI should probably point my blog to juliusbaxter.net/openrisc-irc instead :)20:12
amsit is the best blog around!20:13
blueCmdhaha20:13
* ams is fighting x11, pthreads, and crazy mmap switches all at the same time!20:13
olofkams: Sounds lovely20:14
amsit isn't.20:14
amsdid i say that it is 20 year old code?20:14
blueCmdwhy fight it?20:14
amsblueCmd: because otherwise i will be destroyed20:15
amsand die, a painful death ... or be tortured for infinite20:16
amstime20:16
olofkAny other problem with the syscall approach other than it is slow? Does it work on multi core for example?20:17
stekernit doesn't20:17
blueCmdolofk: probably not20:17
blueCmddoesn't do cache snooping et.al20:17
olofkDoes the lwa/swa help with that somehow? Or do both approaches work with proper cache coherency handling?20:18
olofkI mean, the atomic operations don't magically solve the cache issue, right?20:19
blueCmdwell, they kind of do20:19
blueCmdyou can have a swa on the other CPU invalidate the lwa on the first CPU20:19
blueCmdif I understood the concepts correctly20:19
blueCmdand that is done by snooping the accesses20:20
stekernthe syscall method doesn't work, because other cores can access the memory. So it's not completely related to cache coherency, that's another problem20:20
olofkams: Let me guess. You are on a burning train that has lost control and is heading over a cliff. And the only way to stop it is to remotely log in to the control room and start an X application, but it turns out the application is threaded and uses mmap. Am I far off?20:21
stekernthe only thing that's common with the cache coherency and atomicity between cores, is that you snoop addresses to determine if someone has accessed the memory area in question20:22
amsolofk: quite, sounds like a painless death20:22
olofkblueCmd, stekern: Thanks. That will give me enough pointer to write something down20:22
olofkams: Did I mention that the train moves very slowly and that the cliff is only a few meters high?20:22
amsolofk: sounds stil like a nice death20:23
stekernroot@or1k-debian:~# strace ls 2>&1 | grep  or1k_atomic -c20:24
stekern155920:24
amsolofk: consider hacking on x11r4 code, which was written 20 years ago, which uses old old pthreads that have been changed, and on a gnu/linux box that has a bunch of smash stack stuff, and memory protection stuff which cases the program to segfault in unexpected manners while being strapped to the wheel of a motogp motorbike, and driving on spikes while you listen to abba20:24
stekernroot@or1k-debian:~# strace ls 2>&1 | grep  or1k_atomic -v -c20:24
stekern16120:24
blueCmdolofk: see above20:25
stekerndig in the Dancing Queen?20:26
olofkstekern: Thanks. Now my puny brain just have to figure out what I'm reading :)20:26
olofkIs that the number of calls to or1k_atomic vs. other sys calls?20:26
stekernblueCmd: I've started playing a bit with SMPing Linux20:28
olofkams: Are you debugging eniac or something?20:29
stekernfirst step is to get wallento's mor1kx demo to boot Linux on one of the cores...20:30
amsolofk: open genera, ivory, lisp machine20:33
olofkA LISP machine? That's cool. Never thought I would come across someone who actually used one :)20:35
olofkAre you using it to parse your .emacs file?20:35
amsolofk: i've used a real one too ...20:35
amsand i happen to have source code for the ivory emulator that ran on the alpha ... and been fixing it for uhm, more sanity.20:36
blueCmdstekern: cool! don't let me stop your progress, I don't have time to do everything I want to do anyway :)20:36
blueCmdstekern: do you have a rough break-down of your milestones?20:37
stekernblueCmd: I'll keep it transparent and bazaary enough for you to chip in, don't worry ;)20:37
olofkstekern: Do you have a link to the old arch spec where the origianl atomic operations were written down? Or just tell me if there were any descriptions, or if they were just mentioned20:37
blueCmdstekern: nice!20:37
stekernumm, milestones... hack on it until it works? that good enough? =)20:39
blueCmdstekern: well, normally when I work I have stuff like "make it compile", "run a simple program" and so on - not just the waterfall "do it" model :P20:40
blueCmdI mean, what does "SMPing" entail?20:40
stekernisn't "tackle the problems as they appear" quite the opposite to the waterfall model?20:43
blueCmdtoo tierd, not gonna argue20:45
stekernbut I digress, first milestone is to solve the issue with register storage on exceptions20:45
* blueCmd is traveling around in Sweden this week and giving lectures on what he does for a living20:45
blueCmdwith that, 1 day in one city turns out to be quite taxing :(20:46
stekernI can imagine20:48
olofkblueCmd: Ping me if you're in Gothenburg and would like to meet up for a coffee or something20:48
blueCmdolofk: what are you doing tomorrow?20:48
blueCmdturns out that's where I am tomorrow20:48
blueCmdand my lecture is cancelled there20:48
olofkblueCmd: Force feeding my baby penicillin. Other than that... not much20:48
olofkIf you're not interested in hanging out on the town, you can come around to my house? I can pick you up in that case20:49
blueCmdolofk: will I get deadly sick by super-baby-germs?20:50
olofkNah. It's just an ear infection, so if you keep your fingers out from her ears you'll be fine20:50
blueCmdlet's switch to PM20:51
olofkPlease stop implementing stuff for a while. This blog post will never get finished if you keep up this speed22:28
--- Log closed Fri May 09 00:00:40 2014

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