IRC logs for #openrisc Saturday, 2014-04-05

--- Log opened Sat Apr 05 00:00:51 2014
stekern_franck__, olofk: regarding 'test' systems, I believe those belongs more in fusesoc or in a seperate 'fusesoc-testsuite' than in orpsoc-cores05:52
stekernbecause, orpsoc-cores is just a user of fusesoc, it can't be it's task to look after it05:54
stekern_franck__: can you check if this works on your machine?
stekerndalias: I think I've got to the point in my TODO pipeline where musl was, so I'll start with the openrisc port now06:12
olofkstekern: Agree. I think we should just dump test-related stuff under tests in fusesoc06:26
_franck__we agree, I've already started to create a tests folder in fusesoc06:46
_franck__stekern: I'll test it when I get back to my dayjob06:46
daliasstekern, great11:15
stekernblueCmd: how is your atomic patch moving along?12:20
stekernI'm tempted to just implement ll/sc and let it be done...12:20
blueCmdstekern: for kernel space?14:19
stekernyes, for the kernel14:21
stekernI've started to port musl and I'm at the point where I should implement the atomic operations14:22
blueCmdstekern: No, I posted an updated patch but I got no response to that nor my ping14:31
stekernhmm, so in an old (very old) version of the arch spec, this text was present:
stekernI'm thinking about proposing that we add that (or something similar) back in to the arch spec, and then sit down and put in support for it to the implementations that matter most - mor1kx, or1200, or1ksim and qemu (perhaps blueCmd or poke53282 could volunteer on the qemu part)14:58
stekernand then support for it in binutils14:59
blueCmdstekern: sgtm15:14
blueCmdstekern: btw, nice that you're porting musl15:15
daliasstekern, what's the way atomics would be done now?16:36
daliasfwiw, a true atomic CAS is much better than ll/sc16:36
daliaswith ll/sc it's highly nontrivial to get any realtime guarantees about forward progress16:37
stekerndalias: sure, but given the added complexity of implementing true CAS (especially for a load/store RISC arch), I think ll/sc is a lot more feasible for us16:49
stekernand it's a whole lot better than the syscall "hack" we are using now16:49
daliaswell yes, a syscall is a pretty horrible way to do it16:51
stekernwithout hw support, there's not much other options16:52
stekernniosII and microblaze are doing worse in uClibc btw, they turn off interrupts from userspace16:53
stekernbut I noticed that microblaze have added ll/sc now, and are using that in musl16:53
daliasbtw on cpus that lack ll/sc originally but add it later16:59
daliasit's VERY nice if the kernel can emulate ll/sc on older models16:59
daliasthis is less important on soft cores tho because you can just tell ppl to upgrade their softcore :)17:00
stekernthere will be an illegal instruction exception generated on them, so at least theoretically it would be possible to emulate it17:17
daliasiirc linux does that for mips17:17
daliasfor uniproc, emulating ll/sc is trivial17:17
daliasyou just set a flag for ll then do it like a normal load17:18
daliascheck the flag on sc and fail if it's not set17:18
daliasand clear the flag on context switches17:18
daliasfor multiproc it's not possible afaik17:18
daliasbut presumably cpus without ll/sc are not used/usable for multiproc17:19
stekernanother reason we want to get the hw support for it ;)17:19
olofkstekern: Was that in an older version of the arch spec? If so, why was it removed?18:16
Findetonokay I've got linux running under the openrisc sim18:20
Findetonthe problem is18:21
FindetonI try to do ping
Findetonand in the host console it says: ERROR: Failed to write Ethernet packet data: Bad file descriptor.18:21
Findetonin the openrisc console nothing happens18:22
olofkFindeton: You probably need to edit your or1ksim config file18:22
Findetonolofk, that way I'll be able to connect with the host computer?18:22
olofkThere are a few different ways to emulate ethernet in the simulator. I suspect that it is set up to read and write packets to files18:22
olofkFindeton: Yes. You need to activate TUN/TAP support18:23
olofkI haven't done it in a while, so I can't remember the exact details, but I'll see what I can dig up18:23
olofkAre you familiar with tun/tap?18:23
Findetonno but I'll google that18:24
Findetonactually, I see there's a tap configuration already set up18:24
olofkHmm.. iirc jeremybennett put some helper scripts somewhere18:25
olofkYep, they should be in the or1ksim source directory18:26 and sets up and tears down an ethernet bridge18:26
olofkThe bridge must be activated before or1ksim is started18:26
olofkAnd or1ksim must be set up to use tap instead of files, but it sounds like that was already taken care of18:27
Findetonlets try that18:27
olofkHmm.. there are and as well18:28
olofkCan't remember what the difference is18:28
stekernolofk: yes, it was in an old version of the arch spec. as to why it was removed, no idea, perhaps mr Lampret didn't feel like it was ready for the masses and planned on adding it back at a later stage... and then it never happened18:29
olofkstekern: Oh, so it's that old?18:29
Findetonanyway, I'm using the 2011 virtualbox machine so maybe it doesn't have those scripts18:30
olofkFindeton: Could be. You can get them here if you want to take a look yourself,listing?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F#path_openrisc_trunk_or1ksim_18:30
Findetonthanks olofk, lets see18:32
stekernolofk: the note about removing the chapter is in the changelog in the latest spec:
stekernso, it was still at that "late" stage in his involvement, maybe he just felt that he would never implement it and therefore scratch it from the arch manual...18:34
Findetonwtf I actually can't find the "openrisc directory" in the virtualbox18:36
FindetonI see a directory with the linux kernel files and so on18:37
olofkFindeton: Haven't used that VM in a while. What are you looking for?18:37
FindetonI think I just can't find my ass18:37
Findetonwell you gave me a link to the openrisc trunk and I'm trying to find those files in my system, but I'll just download the script and run it18:38
Findetonbut this is the virtualbox for openrisc, I should have a(n old) copy of the trunk lol18:39
olofkFindeton: I think the scripts might have been added after the VM was built18:44
olofkI think LoneTech knows the structure of the VM best. IIRC he was involved with creating it18:45
olofkBut yeah, downloading the scripts is probably the quickest solution18:45
olofkOr just run the commands in the scripts manually18:46
FindetonUsage: ./ <username> <groupname> <bridge> <eth> <tap>18:46
olofkCan't help you with your ass unfortunately.18:46
Findetonso what, ./ openrisc users br0 eth0 tap018:47
olofkI would guess so18:47
stekernsounds right18:47
olofkIt seems you need bridge-utils, openvpn and iptables, so make sure those are installed18:48
Findetonyeah ok18:49
Findeton$ sudo ./ openrisc openrisc br0 eth0 tap018:55
Findetoneth0: error fetching interface information: Device not found18:55
Findetoneth0: error fetching interface information: Device not found18:55
Findetoneth0: error fetching interface information: Device not found18:55
FindetonSat Apr  5 20:51:59 2014 TUN/TAP device tap0 opened18:55
FindetonSat Apr  5 20:51:59 2014 Persist state set to: ON18:55
Findetoninterface eth0 does not exist!18:55
FindetonFailed to create eth018:55
Findetonokay, it looks like it's eth8 from dmesg | more | grep eth18:56
Findetonlets see what happens when I run openrisc18:56
FindetonPING ( 56 data bytes18:57
FindetonERROR: Failed to write Ethernet packet data: Bad file descriptor.18:57
Findetonand I don't know how to kill ping from the xterm18:57
olofkFindeton: Are you sure that or1ksim.cfg is setup to use tap?18:58
Findetonyeah I think I know what is happening18:59
olofkGood. Because I haven't got a clue :)18:59
FindetonI need brend19:00
Findetonbecause not everything was right when I run brstart19:00
Findetondevice br0 already exists; can't create bridge with the same name19:01
FindetonFailed to create br019:01
Findetonmaybe it created br0, but when it did it was with eth0 which doesn't exist19:01
Findetonand then I try with eth8 but br0 already exist19:02
FindetonI have to remove br0 and run the script right with eth819:02
olofkah ok19:02
Findetonif it makes sense, because I'm not sure xd19:04
Findetonnow it looks fine19:06
Findeton$ sudo /home/openrisc/ openrisc users br0 0th8 tap019:06
FindetonSat Apr  5 21:05:54 2014 TUN/TAP device tap0 opened19:06
FindetonSat Apr  5 21:05:54 2014 Persist state set to: ON19:06
Findetonbut ping still doesn't work lol19:06
Findetonsame thing happens: bad descriptor19:06
Findetonthis is my ethernet config for tap19:08
FindetonI find openrisc very interesting because, at the speed the fpga runs, it looks like we are back to 1991 just when linux was created lol19:10
olofkFindeton: It19:10
olofkFindeton: It's actually slightly faster than that. Look here
Findetonthat cat /proc/cpuinfo did give you 50MHz19:13
Findetonwhich is just right back to 1991 :p19:14
olofkFair enough :)19:14
Findetonbut it's fine for me19:14
FindetonI guess that if we wanted, we could use a more powerfull fpga19:15
Findetonup to about 400-500Mhz19:15
Findetonalso, I don't know much about openrisc but it looks like it can have multiple cores and all that right?19:16
Findetonand that the normal dev board only supports one core19:16
olofk400-500MHz is probably a bit too high, but I've built a stripped version of mor1kx for Virtex-6 and got it running at 200MHz at least19:16
Findetonbut a good fpga could not only support 200Mhz but multiple cores right?19:16
olofkYes. There's a project called optimsoc ( that has been working on multicore support19:17
Findetonand computers nowadays have too much power anyway lol19:17
stekernI for sure didn't have computers running at 50 MHz 199119:17
Findetonfor what I know there were off the shelf computers running at 50MHz19:18
Findetonat that time19:18
stekerniirc 75 MHz pentiums were top-of-the-line 199519:18
olofkWe had a DX2 66MHz, but that might have been 93 or 9419:18
Findetonit would be great to have an  300 Mhz multicore openrisc19:19
stekernyeah, I'm not saying there wasn't, just that the common ones you'd find at average Joes wasn't19:19
FindetonI think it could be a good computer for freedom advocates19:19
Findetonnot only free software but free hardware :p19:19
Findetonwith that kind of power you can do basic things like navigate and watch movies, and develop software too19:20
Findetonand the NSA would not be able to get inside your computer19:21
olofkAnd run RTL simulations :)19:21
Findetonanyway, I cannot get this ping running lol19:21
FindetonI'm going to have dinner now see ya later guys19:21
olofkI finally got XST to use block ram for my wishbone RAM. But it's still using too many resources :(19:26
olofkI got a mor1kx, 16k RAM and 8 bits gpio19:27
olofk8k doesn't work either, and I can't go lower unless I:19:31
olofka) put _start lower than 0x100019:31
olofkb) Do some address decoding magic to avoid wasting like 4k on the interrupt vectors19:32
olofkstekern: Didn't you do some address magic for the sockit?19:32
stekernno, the allwinner guys did on the A3119:33
olofkI thik I will do a special interrupt vector memory that implements 0x200, 0x400... as registers and returns wb_err for the other adresses19:34
olofkOr just mask the 8 lowest bits19:35
olofkIs it that simple or am I missing something?19:35
stekernthe way their worked was that 0x100, 0x200... was mapped in to RAM19:36
stekern0x104, 0x204... always returned 0x1500000019:36
stekerneverything else 0x019:37
olofk15000000, is that nop?19:37
olofkI'll do the same then19:38
stekernour libgloss is of course not compatible with that, so you'll have to roll your own crt19:39
stekernis that on the lx9?19:40
olofkyep, the lx919:40
olofkHmm.. I don't understand the crt issue?19:40
stekernis there no other memory on it?19:40
olofkThere is RAM, but I would prefer to get it running with only block ram to begin with19:41
stekernwell, roll your own startup files19:41
olofkBut why?19:41
olofkAre we using anything below 0x1000 that isn't 0x200, 0x400..?19:42
olofk(probably should objdump -d and find out myself)19:42
stekernno, but:
olofkahh.. reset19:43
stekernand 0x200, 0x300, 0x400.... is larger than 2 insn19:43
olofkOk. it will be slightly hackier than I had expected, but I can probably still save some RAM here19:44
olofk153 words for reset + 6 words for each exception vector19:45
olofk+ some margin19:45
stekernyes, if you special case reset, 6 instructions per vector should be enough19:45
olofkSay 256 words => 1024 bytes19:45
stekernprobably easier to make that 8 though19:45
olofkI could just set an address to or1k_exception_handler and implement it all in hw19:48
olofkThe exception vectors that is19:48
olofkThat would require hacking crt0 though19:48
olofkOr do the exeption vectors differ between the C libraries (or whatever defines them)?19:48
olofkI'm just looking at a hello world dump that was built with or1k-elf19:49
olofkI mean, will the exception vectors for linux look different?19:49
stekernumm, newlib is newlib19:49
stekernlinux is a completely different story19:49
olofkJust noticed that :(19:49
stekernbut I doubt you'll be able to run Linux with 4KB RAM ;)19:50
olofklol. Point taken :)19:50
olofkYeah. I'm mostly doing this to get something running without having to fiddle with the coregen memory controller19:51
olofkI'm not as brave as you who runs without simulating19:51
stekernI'm not brave enough to simulate the MCB...19:52
Findeton4KB RAM? that's not much lol19:53
Findetonis that memory fpga driven?19:53
stekernI've done it at some point, but at some point ISE broke the scripts I had to build the stuff for it, and then it took ~1 hour to build the core libs...19:54
olofkstekern: Which sim were you using then?19:55
stekernmodelsim, which is another source of the problem19:56
stekernI don't have access to it19:56
olofkYeah. Same here. isim is a no go. It's insanely slow and doesn't support VPI. Altera's modelsim version might possibly be able to use the Xilinx libs, but I doubt it19:59
olofkstekern: What's this for? mor1kx_simple_dpram_sclk20:04
olofk256x100 bit RAM20:04
stekernit's used for several things20:05
stekerncache and mmu20:05
olofkAhh.. it might be wise to disable the mmu's for now20:06
olofknewbie question. How do I calculate the cache sizes? From set_width, block_width, ways and limit width?20:07
olofkYes! That did the trick. I got a .bit now20:10
olofkI'll celebrate that by pushing my ISE support20:13
Findetonshit I need to really get this tun tap thing working20:14
Findetonit still says bad file descriptor20:15
olofkWe should add on your argument parser for 64 bit and ise path detection after that20:16
olofkFindeton: You got the bridge up and running now?20:17
olofkNot sure how it's supposed to work, but it looks like or1ksim will look for a tap0 device. Do you have that?20:18
Findetonyes, as far as I know20:18
Findeton$ sudo /home/openrisc/ openrisc users br0 0th8 tap020:18
FindetonSat Apr  5 22:18:19 2014 TUN/TAP device tap0 opened20:18
FindetonSat Apr  5 22:18:19 2014 Persist state set to: ON20:18
FindetonI don't know how can I test it more than that20:18
olofkSeems like it's working :)20:19
Findetonmaybe I should get the latest version of the or1ksim20:20
olofkFindeton: Yes. That might be it actually. And if you do, make sure to build it with --enable-ethphy20:21
Findetonthat was what gave it away for me lol20:21
olofkstekern _franck__ juliusb: Where can I find the most awesome LED blinking program?20:26
_franck__I have one here:
olofk_franck__: Couldn't you at least have added one comment? :)20:31
olofkI'm trying to figure out how fast it should be blinking20:32
_franck__look on the website20:32
olofkah.. sorry :)20:32
_franck__stekern: did you ever try to use vga_lcd with 8 bpp ?20:37
Findetoni'm doing a svn co
olofkFindeton: That might take a while20:37
Findetonis that too extreme? it's taking a lot of time20:37
stekern_franck__: yes20:37
olofkFindeton: You can either just checkout openrisc/trunk/or1ksim or get it from github20:38
_franck__stekern: ok, I just changed 16bpp -> 8 bpp and it stop working. Didn't try to find out why for now20:40
stekernare you using the upstream driver?20:41
_franck__you told me I should20:42
stekernyes, you should20:42
stekernit's not working in the unupstream20:42
stekernthat said, I actually don't think I ever got 8bpp working on my de0_nano LCD. The screen just started scrolling.20:43
stekernnever figured out what was wrong20:43
olofkHow does 8bpp work in VGA/LCD? Is it using a palette?20:44
_franck__ok I'll try to find out. I really want to get my LCD to work20:44
_franck__AFAIK, yes a Color look up table20:45
stekernyes, palette20:45
olofkI'm so fucking bad ass! I just figured out that I could cherry-pick a commit from one branch and apply to another20:51
Findetonwell okay I get the latest or1ksim21:00
Findetonbut how do I run linux with it?21:00
olofkFindeton: Same way as you did with the one you had in the VM?21:02
stekernolofk: I told you that last week =)
olofkstekern: Oh.. ok... damn! :(21:03
Findetonolofk: that was easy because the vm alreadid had everything done already :p21:04
stekernbut since you didn't listen to me, I guess you can take the credit for figuring it out on your own now ;)21:04
FindetonI just run $ sim -f arch/openrisc/or1ksim.cfg vmlinux21:04
olofkstekern: I strongly suspect that I remembered it from last week somewhere in my head21:04
olofkFindeton: Shouldn't that be or32-elf-sim ?21:09
olofkDid you build and install it?21:09
Findetonyeah I built or1ksim21:09
FindetonI guess in 2011 it had another name?21:09
stekernnah, it's always been sim21:12
stekernunless you build it together with a toolchain21:12
_franck__stekern: olofk : I started doing a test cores/systems in fusesoc21:20
_franck__It's full of copy/paste mistakes but feel free to comment21:20
_franck__these are only working tests21:21
LimbHey. I'm trying to adapt the board configs for a Nexys 4 (Artix7).. What would be the recommended base board to start modifying?21:26
olofkLimb: Your best option is to wait for a day or two. I'm just about to push support for building with Xilinx ISE and then stekern can push his Atlys port21:30
olofkUnless you need vivado support. We haven't done that yet21:30
LimbISE support is just fine21:31
LimbWhat will be different with building with ISE now then it is currently?21:31
olofkLimb: There's no ISE support currently21:31
olofkUnless you are looking at orpsocv221:32
LimbTo be honest I haven't a clue what I'm looking at really. I was following this guide:
LimbDocumentation seems to be all over the place. I figured I would've been able to build with ISE from the command line. I'm assuming this isn't correct?21:33
olofkLimb: Yes. We're sorry about the sad state of documentation. It's a bit messy :/21:34
LimbGotta start somewhere hehe21:35
olofkBut yes, you can build with ISE manually. No problems21:35
LimbSo you're going to push changes that would allow you to build with the ISE IDE?21:35
Limbstefan/orpsoc on the git repo, is this v1 v2 or v3?21:40
olofkLimb: v221:44
olofkThere was an orpsocv3, but it has now transformed into fusesoc (which is what you want to use)21:44
olofkI really really need to write that clarifying blog post soon :)21:45
LimbWhere is fusesoc located?21:45
LimbAnd would i be fine with v2?21:45
olofkWe are working on deprecating orpsocv221:45
olofkShort back story: orpsocv2 was a big lump containing build scripts, software, or1200, a few cores and some other stuff21:46
olofkIt turned out to be a bit painful to maintain as there were more cores and boards to support21:47
olofkSo I started working on orpsocv3 which separated the build infrastructure from the RTL code21:47
olofkAlong the way I realized that the build infrastructure didn't contain any OpenRISC-specific code, so I decided to rename it to fusesoc21:47
olofkfusesoc doesn't contain any RTL code. Instead it uses another repository called orpsoc-cores (
LimbAh. I can see why I'd want to use fusesoc haha21:49
LimbCan i mess around with it now? as in still be able to build from command line?21:49
Limbor should I really wait 2 days for that code push haha21:49
olofkIf you want to get started right away you can export any of the supported systems and do the building step manually21:50
olofkstekern _franck__ : I pushed some quartus changes. Please tell me if I broke something. I rebuild de0_nano without any problems21:53
olofkAlright then. ISE support is pushed. stekern, it would be great if you could rebase your ISE patch to add the 64 bit selection and ise path stuff22:01
olofkAnd perhaps push the atlys port. Several people have asked for that one22:02
olofkoh... I forgot to update the documentation22:02
olofkI'll do that tomorrow22:02
olofkGood night for now22:02
--- Log closed Sun Apr 06 00:00:53 2014

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