| --- Log opened Tue Feb 04 00:00:24 2014 | ||
| -!- julzmb_ is now known as julzmb | 00:16 | |
| -!- Netsplit *.net <-> *.split quits: heroux, rah_, ssvb | 06:38 | |
| -!- heroux_ is now known as heroux | 06:39 | |
| -!- Netsplit over, joins: ssvb | 06:46 | |
| joaocfernandes | hello everyone i am trying to compile the toolchain, on one of the last steps , building gcc with newlib i get the following error. I would appreciate a clue: http://pastebin.com/GCRHrA1G | 09:21 |
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| stekern | joaocfernandes: how did you perform the earlier steps? | 10:05 |
| joaocfernandes | stekern, i followed the 3 previous steps on this link http://opencores.org/or1k/OpenRISC_GNU_tool_chain#Installation_of_development_versions | 10:07 |
| stekern | ok, that should work | 10:07 |
| joaocfernandes | i already repeated them again , just to be sure if i did some mistake | 10:08 |
| Powermaniac | Hey guys, how are you? | 11:19 |
| Powermaniac | I was accepted into university today! | 11:19 |
| joaocfernandes | congratulations | 11:20 |
| Powermaniac | Thanks! | 11:20 |
| joaocfernandes | what course? | 11:20 |
| Powermaniac | A Bachelor of Science, going to major and minor in Computer Science, Computer Systems and Mathematics | 11:21 |
| Powermaniac | Not sure which will be the major yet though. | 11:21 |
| Powermaniac | This is sort of a stepping stone | 11:22 |
| Powermaniac | From there I'm thinking after a year I will transfer into either a straight computer science degree or computer engineering degree or electrical and electronic engineering degree | 11:22 |
| joaocfernandes | thats cool :) | 11:23 |
| Powermaniac | Only recently started tossing up again which degree to end up transfering to, as I've been doing some reading and it sounds as though software/algorithms is holding back artificial intelligence whereas I was going to approach it from the hardware angle | 11:30 |
| joaocfernandes | stekern, it was my bad i repeated all over again and now it is working :) thanks | 14:59 |
| stekern | joaocfernandes: great! I hadn't seen that before, but it could of course be a new problem. glad it got sorted out | 15:11 |
| maxpaln | stekern: your memory controller has proved a big help - although I ended up rewriting a lot of it :-) The Xilinx memory controller in the Spartan 6 appears handle the clock domain crossings from DDR to local bus which makes life a lot easier. Our IP doesn't offer the same ease-of-use so I have to handle the clock domain crossing and handshaking in the logic. The writes are working now and | 18:25 |
| maxpaln | the reads should be straight forward though. thanks for pointing me in the right direction :-) | 18:25 |
| joaocfernandes | is someone working on support for the atlys board on the orpsoc ? | 18:53 |
| _franck_ | jonmasters: I think olofk is working on adding Xilinx tools support to orpsoc | 20:23 |
| --- Log closed Wed Feb 05 00:00:25 2014 | ||
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