| --- Log opened Sun Dec 29 00:00:30 2013 | ||
| butcher_ | hi has there been any effort on an out-of-order core design for openrisc ? | 01:46 |
|---|---|---|
| butcher_ | hi which one is the current repository for or1ksim architectural simulator | 04:39 |
| butcher_ | the svn repo seems unresponsive | 04:39 |
| _franck_ | butcher_: you can find or1ksim on the openrisc's github here: https://github.com/openrisc/or1ksim | 07:34 |
| butcher_ | I am interested in developing a core for orbis64 | 07:34 |
| butcher_ | so as a first step I presume I will have to make a 64 bit model for or1ksim | 07:35 |
| _franck_ | I guess it's a good idea to start with the sim first | 07:35 |
| butcher_ | i mean i will need it for a reference model if I try making RTL | 07:36 |
| butcher_ | question is though I understand RTL fairly well how much work do you think is to create a or1ksim 64 bit model, given its all C | 07:37 |
| butcher_ | though orbis32 and orbis64 is not that different | 07:37 |
| _franck_ | butcher_: I can't tell, I've only work the peripheral side of or1ksim. jeremypbennett is the one who knows | 07:39 |
| _franck_ | *on | 07:39 |
| butcher_ | I see, thanks anyway | 07:39 |
| butcher_ | has there been previous efforts towards orbis64 ? | 07:40 |
| butcher_ | I know thats its not in plan for openrisc 2k | 07:40 |
| stekern | butcher_: I don't think there has been, but I think it sounds like fun | 08:35 |
| --- Log closed Sun Dec 29 15:28:38 2013 | ||
| --- Log opened Sun Dec 29 15:28:54 2013 | ||
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| --- Log closed Mon Dec 30 00:00:31 2013 | ||
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