| --- Log opened Fri Sep 20 00:00:04 2013 | ||
| poke53281 | http://pastie.org/8340655 | 03:35 |
|---|---|---|
| poke53281 | At least a little progress | 03:35 |
| stekern | oh, a good old sp trashing... sounds like fun! | 03:36 |
| poke53281 | The kernel jumps back to the process after a timer interrupt to a wrong address. | 03:36 |
| stekern | do I remember correctly that you've tried in or1ksim and got the same kind of crashes there, right? | 03:38 |
| poke53281 | yes | 03:38 |
| poke53281 | The output you see is my own little equivalent of strace. | 03:38 |
| stekern | nice ;) | 03:39 |
| stekern | but you have pinpointed that r1 is correct before the timer interrupt? | 03:39 |
| poke53281 | Well, all registers are wrong. It aborts after one error. | 03:40 |
| poke53281 | I save the registers values and check when I am going back via the rfe opcode. | 03:40 |
| stekern | ah, well, if something in timer exception trashes r1 | 03:40 |
| stekern | you'll get wrong values in all registers on context restore | 03:41 |
| poke53281 | Yes, and the wrong pc | 03:41 |
| stekern | so, that's why I'm only asking about r1 ;) | 03:41 |
| poke53281 | Ok, the output is a little bit misleading. Everything is wrong. | 03:42 |
| stekern | ? | 03:42 |
| poke53281 | all registers and the pc. There is nothing else what could be wrong. | 03:42 |
| poke53281 | So not only r1 | 03:42 |
| poke53281 | I can check the mapping at that point | 03:43 |
| stekern | yes, but... trash r1 => everything wrong | 03:43 |
| poke53281 | yes | 03:43 |
| stekern | on context restore | 03:43 |
| stekern | so r1 is the interesting part | 03:43 |
| poke53281 | Yes | 03:44 |
| stekern | all else is just collateral damage ;) | 03:44 |
| poke53281 | the same happens in pid 0 and pid 1 after the init process is started. But I think this is normal. Has something to do with fork. | 03:47 |
| stekern | but wait... what do you mean by wrong? isn't task switch triggered by the timer? | 03:47 |
| poke53281 | Probably there is something additional like the task_id. But I cannot find that info. | 03:47 |
| poke53281 | Yes, it is. And the rfe command is the last command in kernel mode after handling the timer interrupt. | 03:49 |
| poke53281 | It should jump back to to the position where the timer occured. But it didn't happen. | 03:49 |
| poke53281 | The command timer interrupt before worked as expected. Exception at 0x00085250 and turn back at 0x0008524C | 03:50 |
| poke53281 | possible a delayed instruction | 03:51 |
| poke53281 | So I have not seen any tasks in xorg-server | 03:56 |
| poke53281 | And I have not seen any exception before that that stops at this position. So I can exclude any task-switches. | 03:57 |
| poke53281 | And the program crashes a few hundred commands later. | 03:57 |
| stekern | yeah, something is clearly wrong with where it jumps | 03:58 |
| stekern | I'm just trying to pinpoint where it has went wrong | 03:58 |
| poke53281 | Wait I give you something to play with | 04:06 |
| stekern | is it christmas already? ;) | 04:07 |
| poke53281 | A puzzle. Find the needle in the haystack which is permutating if you have excluded 90% of the haystack. | 04:09 |
| poke53281 | And the needle has the same color as the hay. | 04:09 |
| stekern | at least there is a needle | 04:09 |
| poke53281 | simulationcorner.net/opencore5/ | 04:10 |
| poke53281 | Xfbdev & | 04:10 |
| poke53281 | export DISPLAY=:0 | 04:10 |
| poke53281 | xeyes | 04:10 |
| poke53281 | look at the console output | 04:10 |
| poke53281 | It is a more safe deoptimized version of the emulator. Use chrome if possible. | 04:11 |
| poke53281 | To exclude errors of the emulator | 04:11 |
| poke53281 | Probably you have to clear the console after each command. Otherwise the console could stuck. | 04:12 |
| poke53281 | cat /proc/49/maps could be also useful | 04:13 |
| stekern | yes... I got one eye and now the browser window is non-responsive | 04:13 |
| poke53281 | Yes, look in the console. It stopped for some reason. | 04:14 |
| poke53281 | I think an unaligned access is the final reason. | 04:14 |
| poke53281 | The output is so big that you should clear the console after "Xfbdev &" | 04:15 |
| stekern | no... there's no output other than "normal" output | 04:15 |
| poke53281 | 63: _libc_read | 04:15 |
| poke53281 | 64: _libc_write | 04:15 |
| poke53281 | 1068: poll | 04:15 |
| poke53281 | 29:ioctl | 04:15 |
| poke53281 | 260:wait4 | 04:15 |
| poke53281 | 1024:opendir | 04:15 |
| poke53281 | 154: setpgid | 04:15 |
| poke53281 | 1067: libc_select | 04:16 |
| poke53281 | 169: gettimeofday | 04:16 |
| poke53281 | 134: rt_sigaction | 04:16 |
| poke53281 | 221: execve | 04:16 |
| poke53281 | 214: brk | 04:16 |
| stekern | "Warning: X locale modifiers not supported, using default" is the last output | 04:16 |
| poke53281 | Yes, I removed the files. Not enough space in the image. | 04:17 |
| stekern | yeah, I'm not so worried about that message, just to illustrate what I meant by "normal" ;) | 04:17 |
| poke53281 | I can put them in. But you can ignore the warning message of Xfbdev. Most of them are because of missing files and missing command line | 04:17 |
| poke53281 | X is already drawing the image. He is in libpixman and in the right function. So what should happen? | 04:19 |
| stekern | it shouldn't crash at least | 04:21 |
| stekern | but... what am I suppose to see in console? | 04:22 |
| poke53281 | Maybe it wouldn't if I would handle the unaligned access. As I said. I get all kind of errors with different clients. | 04:22 |
| poke53281 | Javascript console | 04:22 |
| poke53281 | Development tools | 04:22 |
| stekern | haha, ok | 04:23 |
| poke53281 | what browser do you use | 04:23 |
| poke53281 | You get at least 1MB of text with all syscalls and exceptions and all pids | 04:23 |
| poke53281 | Have to leave for 30 minutes. | 04:24 |
| stekern | I thought you meant Linux console | 04:24 |
| stekern | what is at 0x0016980C? | 04:48 |
| stekern | I think the 'r does match' might not be a failure | 04:49 |
| stekern | and what is at 0x30073448? | 04:50 |
| poke53281 | re | 04:56 |
| poke53281 | one moment | 04:56 |
| poke53281 | both pid 49? | 04:57 |
| poke53281 | or higher | 04:58 |
| stekern | yes pid 49 it seems to be | 05:00 |
| stekern | this is right before it crashes | 05:00 |
| poke53281 | 169800: 84 21 ff f4 l.lwz r1,-12(r1) | 05:02 |
| poke53281 | 169804: 44 00 48 00 l.jr r9 | 05:02 |
| poke53281 | 169808: 86 01 ff f8 l.lwz r16,-8(r1) | 05:02 |
| poke53281 | 16980c: d7 e1 4f fc l.sw -4(r1),r9 | 05:02 |
| poke53281 | 169810: d7 e1 87 f8 l.sw -8(r1),r16 | 05:02 |
| poke53281 | 169814: 04 00 00 02 l.jal 16981c <OsCleanup+0x54> | 05:02 |
| poke53281 | 169818: 1a 00 00 05 l.movhi r16,0x5 | 05:02 |
| poke53281 | 16981c: aa 10 14 fc l.ori r16,r16,0x14fc | 05:02 |
| poke53281 | 169820: e2 10 48 00 l.add r16,r16,r9 | 05:02 |
| poke53281 | so somewhere in between the function OSCleanup | 05:02 |
| poke53281 | the other one is a shared library. | 05:03 |
| stekern | let me elaborate what I'm after. there are a lot of 'r does not match' in the trace, "all" of them come after an rfe to 0x0016980C, then there's a syscall 139 and the rfe after that goes back to where the original exception occured | 05:03 |
| stekern | I think this is normal | 05:03 |
| poke53281 | after is wrong | 05:05 |
| poke53281 | they are checked directly at the rfe command | 05:05 |
| stekern | "after"? | 05:06 |
| stekern | I'm not following | 05:06 |
| poke53281 | " after an rfe to 0x0016980C" <- stekern | 05:06 |
| poke53281 | So they are written after the rfe command but the check is directly at the position of the rfe command. | 05:07 |
| stekern | ah, yes, but I meant "after" as in after in the trace output | 05:07 |
| poke53281 | The registers are saved at the syscall or at the exception | 05:07 |
| poke53281 | So what you see in the console is only what happens in user mode. | 05:09 |
| poke53281 | or at the context switch | 05:09 |
| stekern | yes, but then it might do the _work_pending dance in the middle of an interrupt/exception | 05:11 |
| poke53281 | exactly. Somewhere in the kernel | 05:11 |
| poke53281 | "/a.out is a tiny test program I wrote | 05:13 |
| poke53281 | run it with "/a.out /usr/lib/*" | 05:14 |
| poke53281 | it loads all files and compares mmap with fread of all files. | 05:14 |
| poke53281 | And it does not unmap. | 05:14 |
| poke53281 | I have found no problem found with this tool. So it is not so easy. | 05:15 |
| poke53281 | I am very that the other address is somewhere in libpixman. | 05:17 |
| poke53281 | very sure ... | 05:17 |
| stekern | ok... | 05:17 |
| poke53281 | Yep, it is | 05:20 |
| poke53281 | 653e8: 00 00 00 4f l.j 65524 <pixman_rasterize_edges+0xd860> | 05:24 |
| poke53281 | 653ec: d4 03 28 00 l.sw 0(r3),r5 | 05:24 |
| poke53281 | 653f0: 10 00 00 4d l.bf 65524 <pixman_rasterize_edges+0xd860> | 05:24 |
| poke53281 | 653f4: e1 a5 63 06 l.mul r13,r5,r12 | 05:24 |
| poke53281 | 653f8: e0 a5 43 06 l.mul r5,r5,r8 | 05:24 |
| poke53281 | 65448: 86 23 00 00 l.lwz r17,0(r3) | 05:24 |
| poke53281 | 65448 is the correct address | 05:24 |
| poke53281 | So I think I will watch the addresses where the registers are saved. | 05:28 |
| poke53281 | Either the content will change, or the pointer or the mapping | 05:29 |
| poke53281 | And I can print the exceptions inside the kernel and so on ... | 05:32 |
| poke53281 | Enough to do | 05:32 |
| poke53281 | http://stackoverflow.com/questions/9305992/linux-threads-and-process | 06:11 |
| poke53281 | According to this answer the pid is fine. So this is no other thread with the same pid. | 06:12 |
| olofk | _franck_: I think we could have a problem here. It looks to me like patch 0000 doesn't really change the line endings | 06:37 |
| olofk | If I run dos2unix on mt48*.v first, I can apply the patches manually without problems | 06:38 |
| olofk | (including patch 0000) | 06:38 |
| olofk | Not really sure how to handle this | 07:02 |
| olofk | I got three ideas | 07:02 |
| olofk | 1. Implement support in .core files for running commands at different stages (in this case, run dos2unix on the files when they have been downloaded to the cache). This functionality will have to be added sooner or later anyway, but I wanted to wait for a while | 07:03 |
| olofk | 2. Keep the windows file endings and make patches that are compatible with this. Not sure if this is doable actually, but it might work with the --binary switch in patch | 07:04 |
| olofk | 3. Keep the damn file local. Feels like the most hacky solution, and I really don't want to carry files with weird licenses in the orpsoc-cores tree | 07:05 |
| olofk | oh. and alternative 4. Fix the problem by making the patch actually change the line endings | 07:05 |
| stekern | poke53281: I'm still curious about the 0x16980c though, why is it always going there? | 08:00 |
| stekern | this yocto stuff is just annoying | 10:10 |
| stekern | ...perhaps partly because I don't know what I'm doing | 10:19 |
| stekern | it could be useful for building an openrisc bsp though | 10:21 |
| jeremybennett | is opencores.org OK or just slow? | 10:40 |
| jeremybennett | just slow it seems... | 10:41 |
| stekern | jeremybennett: I noticed it being slow in the morning | 10:45 |
| jeremybennett | I've just updated the schedule for ORCONF with the new talks we've got. I'll post the updates to the mailing lists. | 11:17 |
| olofk | Great. It's fun to see an increased interest this year | 11:20 |
| Powermaniac | Anyone awake/there in here? | 11:45 |
| jeremybennett | Powermaniac: yes | 11:45 |
| Powermaniac | Ahh good! | 11:46 |
| Powermaniac | Maybe you can help | 11:46 |
| Powermaniac | So now I'm slowly beginning to understand more | 11:46 |
| Powermaniac | And I was wondering if I could synthesize the OR1200 to look at basically. | 11:46 |
| jeremybennett | Well it is synthesizable. | 11:47 |
| Powermaniac | As in from what I understand you can synthesize verilog HDL code into RTL schematics? | 11:47 |
| jeremybennett | If you come along to ORCONF, there is a workshop on bringing up the ORPSoCv3 on a DE0-nano. | 11:47 |
| jeremybennett | (which includes the OR1200 core) | 11:47 |
| Powermaniac | Where is ORCONF? | 11:47 |
| jeremybennett | Cambridge, UK | 11:47 |
| Powermaniac | Yeah that probably won't be possible. I'm beyond broke. | 11:48 |
| Powermaniac | Annoyingly | 11:48 |
| Powermaniac | Unless it will be streamed or something? | 11:48 |
| Powermaniac | Also I'm not actually trying to put it on an FPGA... | 11:49 |
| Powermaniac | I just want to look at the verilog code and then the schematics as from what I understand I can turn that verilog code into schematics to look at. | 11:49 |
| Powermaniac | I'm just sort of skipping ahead where I'm at in the book (Digital Design by Morris Mano) so I have something to look at. | 11:49 |
| Powermaniac | If that makes sense? | 11:50 |
| olofk | Powermaniac: I think you underestimate how complex the schematics would be at register level from synthesized or1200 | 11:51 |
| olofk | A single submodule of or1200 might be a better starting point. For example, the alu or the cache controller | 11:52 |
| Powermaniac | Okay, sure | 11:52 |
| Powermaniac | Gives me a place to start | 11:52 |
| olofk | The easiest way to look at a synthesized netlist is probably to install some FPGA vendors toolchain and run a module (or the whole or1200) through synthesis | 11:53 |
| olofk | That would give you a schematic representation of what it might look like | 11:53 |
| olofk | Both Altera and Xilinx have free basic versions of their toolchains | 11:54 |
| Powermaniac_ | Odd how IRC randomly disconnects on me, only IRC though nothing else... | 11:56 |
| Powermaniac_ | Anyway | 11:56 |
| olofk | Powermaniac_: Did you get my messages, or were you disconnected before that? | 12:03 |
| Powermaniac_ | This was the last one I got: <olofk> The easiest way to look at a synthesized netlist is probably to install some FPGA vendors toolchain and run a module (or the whole or1200) through synthesis | 12:04 |
| Powermaniac_ | Sorry | 12:04 |
| olofk | 11:53 < olofk> That would give you a schematic representation of what it might look like | 12:05 |
| olofk | 11:54 < olofk> Both Altera and Xilinx have free basic versions of their toolchains | 12:05 |
| Powermaniac_ | Okay | 12:05 |
| Powermaniac_ | Trying to find a guide, so once I know where to find the verilog code of one of the parts of the OR1200 then I can turn it into a schematic | 12:06 |
| olofk | They are available in SVN | 12:07 |
| Powermaniac_ | Aloso could I use QFlow as my synthesizer? http://opencircuitdesign.com/qflow/welcome.html | 12:07 |
| olofk | That might work. I haven't used it though, so I can't say for sure if it works and if you get a RTL schematic out of it | 12:08 |
| Powermaniac_ | Okay fair enough. | 12:08 |
| Powermaniac_ | Also is this the code I'm looking for: http://opencores.org/ocsvn/openrisc/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_alu.v | 12:09 |
| Powermaniac_ | Currently on Windows need to swap over to Debian | 12:09 |
| Powermaniac_ | As from what I gather it will make the process easier | 12:09 |
| stekern | Powermaniac_: yes, that's or1200's alu | 12:13 |
| olofk | Powermaniac_: I made you a PDF of or1200's alu using the default parameters synthesized with XST https://www.dropbox.com/s/ojizumejb2mu6u3/or1200_alu.pdf | 12:14 |
| Powermaniac_ | olofk: Thanks! | 12:14 |
| Powermaniac_ | Woah | 12:15 |
| olofk | I don't with to discourage you from doing digital electronics (it's a lot of fun), but I think you should know that there is a reason why people aren't doing these kind of things by hand anymore | 12:15 |
| olofk | This is just one of the submodule in one of the cores that you use to build one of the chips of your computer | 12:15 |
| Powermaniac_ | I wonder if it's possible to get a bigger company to create completely open source processors? | 12:16 |
| Powermaniac_ | Like Adafruit or Arduino | 12:16 |
| Powermaniac_ | Is it actually possible to synthesize the entire OR1200 as that must be huge then | 12:17 |
| olofk | Synthesize just means that you take the HDL code and translate it into a netlist (a representation of the schematics). That is done by a computer program and is very possible to do :) | 12:18 |
| olofk | But you never use that as a basis to build things with discrete components | 12:18 |
| Powermaniac_ | Oh okay(?) | 12:18 |
| Powermaniac_ | Well yeah I was sort of planning to build it with discrete components. But also use certain chips I can easily get the schematics for of what's inside. So less discrete components are needed | 12:19 |
| olofk | That netlist is just consumed by other tools that create the layout for an ASIC or an FPGA | 12:20 |
| Powermaniac_ | And make it on loads of breadboards you put into a slotted box, or something. | 12:20 |
| Powermaniac_ | So how do you learn enough to actually be able to contribue to something this huge? | 12:21 |
| olofk | You learn the theories of digital electronics, and then get good at writing Verilog or VHDL code | 12:21 |
| olofk | If you desperately want to build a CPU on a breadboard, there are plenty of people who have done that with 4-bit or perhaps even 8-bit CPUs. They are quite large and complex, and a 32-bit RISC CPU like OpenRISC would be out of the question to design that way | 12:22 |
| stekern | ...starting crazy projects building multistage RISC machines out of discrete components on breadboards you do *after* that | 12:22 |
| stekern | ;) | 12:22 |
| Powermaniac_ | Ahh, stepping stones...Probably a good idea, I like having grand ideas and trying to go straight for them... | 12:23 |
| Powermaniac_ | Doesn't really work out that well though... | 12:24 |
| Powermaniac_ | What do you guys think about Moore's Law and the fact Intel is worrying about it already. And the idea of spintronics or quantum computers or soemthing else taking silicon's place like graphene? | 12:25 |
| olofk | Here's a design for a 4-bit CPU if you would like to try something like that http://jaromir.xf.cz/fourbit/fourbit.html | 12:25 |
| Powermaniac_ | Wait what do you guys do jobs wise to be able to be knowledgeable about designing the OR1200? | 12:28 |
| Powermaniac_ | If you don't mind me asking that is... | 12:29 |
| olofk | I work as a Digital Design Engineer. I guess most people here work with embedded systems or FPGA/ASIC | 12:29 |
| Powermaniac_ | Oh cool | 12:29 |
| Powermaniac_ | Have you heard of the Neurosynaptic chip made by IBM? What do you think of that? | 12:29 |
| olofk | Never heard of | 12:30 |
| Powermaniac_ | As I'm also a technological singularity nut and well some people think hardware is also blocking our path to the technological singularity as computers or CPUs rather don't work anything like the brain | 12:30 |
| Powermaniac_ | Is there any talk about designing processors more like brains in the digital design area? | 12:35 |
| Powermaniac_ | Area I hope to get into actually, first I need to get into electronic engineering and from there I can get into computational neuroscience | 12:37 |
| Powermaniac_ | Mainly just so I can try and make the technological singularity happen, or well that is the plan anyway | 12:37 |
| Powermaniac_ | Anyway thanks guys for the help once again! | 13:02 |
| olofk | No problems. Hope you make it into EE | 13:02 |
| jeremybennett | Powermaniac_: We won't be streaming ORCONF, but all being well, the talks will be videoed. | 13:14 |
| Powermaniac_ | jeremybennett: Sweet thanks! | 13:14 |
| jeremybennett | olofk: Do you know why opencores.org is so slow today? | 14:47 |
| poke53281 | stekern: Not sure. I will find out | 15:17 |
| stekern | this yocto stuff is driving me crazy, all I want is for it to build a native toolchain and put it into my image... | 15:18 |
| stekern | starts to feel just building the whole image by hand would be faster and less frustrating | 15:19 |
| poke53281 | stekern: http://pastie.org/8342338 | 18:20 |
| poke53281 | Found the position where the saved registers are overridden. | 18:20 |
| poke53281 | Somewhere in between the signal handler. | 18:21 |
| stekern | poke53281: hmm, ok r2 == regs in that function | 18:41 |
| stekern | I assume setup_rt_frame is inlined there too | 18:42 |
| stekern | and it's actually in that that the bad stuff happens | 18:42 |
| stekern | but is it really "bad"? | 18:49 |
| poke53281 | No I think the function is Ok. | 18:51 |
| poke53281 | The bad stuff is happening somewhere else | 18:51 |
| poke53281 | But it is not a position where a saved register is changed willingly. | 18:52 |
| poke53281 | That's important | 18:53 |
| stekern | yeah, as I said earlier, the register overwriting is probably fine, in the general case | 18:53 |
| stekern | answer to what you wrote two lines up | 18:54 |
| poke53281 | Yes | 18:54 |
| stekern | how do you mean "But it is not a position where a saved register is changed willingly." | 18:54 |
| poke53281 | During the timer exception around 9000 assembler command are executed. No exceptions. | 18:54 |
| poke53281 | not intended . | 18:55 |
| stekern | 9000? | 18:55 |
| poke53281 | With "saved register" I mean the saved registers for the user process. | 18:56 |
| poke53281 | Everything what could cause the problem happens within 9000 instructions | 18:58 |
| poke53281 | r2 points directly to the same virtual memory address as r1 when the registers are saved. No page table change is done during that time. | 19:04 |
| poke53281 | and the problems occurs when 95% of the whole exception has already been executed. | 19:07 |
| stekern | did you change the opencore5? | 19:11 |
| poke53281 | No | 19:12 |
| poke53281 | Local | 19:12 |
| stekern | funny, I get different result now than during the day (different machine) | 19:12 |
| poke53281 | Possible. | 19:13 |
| poke53281 | Depends on what you are doing before. | 19:13 |
| poke53281 | But it is not machine dependent. I am working also on different machines. | 19:13 |
| stekern | now I got a similar crash as earlier | 19:14 |
| stekern | http://pastie.org/8342462 | 19:15 |
| poke53281 | I would say it is the same as yesterday | 19:15 |
| stekern | but, everything up to Line 12 looks ok, no? | 19:16 |
| poke53281 | no, it has found the register mismatches but continues executing. | 19:18 |
| poke53281 | line no 10 seems to be syscall executed on the stack frame. | 19:19 |
| poke53281 | In principle everything below line 10 you can remove, because it is meaningless. | 19:20 |
| stekern | are you sure? | 19:23 |
| poke53281 | Well, the error already occured. The exception returned at the wrong address with wrong register entries. What do you expect? | 19:24 |
| stekern | but isn't that the work of the signal handler? | 19:25 |
| poke53281 | I don't check the registers of syscalls. They are changed of course. | 19:25 |
| stekern | I'm not sure, I might add ;) | 19:25 |
| poke53281 | I am checking this. At the moment a call graph would be fine of this exception. | 19:27 |
| poke53281 | It is definitely executing the signal_handler and copying data from user space. | 19:29 |
| poke53281 | which is strange for a normal timer exception. | 19:29 |
| stekern | but if there are signals pending | 19:29 |
| stekern | it's not so strange I think | 19:30 |
| poke53281 | Yes, maybe a timer from X11. | 19:30 |
| poke53281 | I was wondering that X11 seems not to have threads running. | 19:31 |
| poke53281 | Well I can put some debug messages in the signal handler. | 19:32 |
| poke53281 | I wish I could use better debug techniques. | 19:34 |
| stekern | debugging on hardware is even more fun, then you get a window of ~2000 clock cycles to look at various signals ;) | 19:35 |
| poke53281 | signal 14 | 19:41 |
| poke53281 | SIGALRM | 19:43 |
| poke53281 | That makes sense. | 19:43 |
| stekern | yup | 19:43 |
| poke53281 | Maybe I can write a small little program to test this signal. | 19:44 |
| poke53281 | int main() { alarm(1); while(1){} return 0; } | 19:50 |
| poke53281 | Works without problems | 19:50 |
| poke53281 | but the signal is not used. But before I continue ... lunch | 19:53 |
| poke53281 | stekern: http://stackoverflow.com/questions/16024774/how-do-i-use-the-sigalrm-correctly | 21:18 |
| poke53281 | This code seems to reproduce partly the problem. Not crashing but the kernel has exactly the same behavior. | 21:19 |
| poke53281 | Slowly I begin to understand. | 21:41 |
| poke53281 | how this works | 21:41 |
| poke53281 | I think you are right stekern. | 21:48 |
| poke53281 | The error happens later, after the signal | 21:54 |
| poke53281 | Returning back after the signal is the problem. | 21:55 |
| poke53281 | but for some reason the addresses I get with objdump are wrong, or shifted by a few bytes. | 21:56 |
| poke53281 | The context restore after a signal does not work. Most of the registers are wrong. | 23:11 |
| poke53281 | Correction, only r12-r14 are wrong | 23:35 |
| poke53281 | I think I have found the problem. It is in syscall_resume_userspace in entry.S | 23:52 |
| poke53281 | This code is not valid for a sigreturn. | 23:52 |
| poke53281 | because we have to restore all registers | 23:53 |
| poke53281 | Maybe we need a switch there | 23:55 |
| --- Log closed Sat Sep 21 00:00:05 2013 | ||
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