--- Log opened Sun Sep 01 00:00:36 2013 | ||
stekern | poke53282: that's a nice board, I have one, olofk has one and _franck_ too | 03:01 |
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stekern | you can easily "ignore" the "silicon heater" (as olofk puts it), and it has a nice set of peripherals and a big fpga | 03:02 |
stekern | I'd go for that, the price is very decent too | 03:03 |
stekern | juliusb: (addicted to celebrity) yeah, I've heard that the OpenRISC groupies are the best, but I haven't seen any of them yet, so I just keep on pushing harder | 03:04 |
stekern | knz: regarding LCD, I have a 4" LCD addon for de0 nano, but it has been discontinued, there's this replacement though: http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=68&No=653 | 07:18 |
stekern | this is the one I have: http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=184&No=213 | 07:18 |
knz | stekern: thanks for the hint | 08:35 |
olofk | The Atlys board has a nice price too, but I'm so fed up with Xilinxs toolchain that I would recommend an Altera board | 11:18 |
stekern | olofk: I agree, and the sockit goes for less money (the retail price is $249 now) too | 12:48 |
stekern | to bad we don't have an orpsoc port for it yet, but I have said it's on my todo list to do an orpsocv3 port for, and it's close to the top of the list now | 12:52 |
stekern | only two items before it | 12:53 |
stekern | would be nice if we had de0 nano and sockit orpsocv3 ports by the conference | 12:54 |
stekern | the parallella boards are of course pretty nice and affordable too, just a little uncertain lead time on them | 12:54 |
olofk | Yeah, I'll probably order a DE0-nano to make an orpsocv3 port. Seems like the most common board | 14:27 |
knz | I found this one has a balanced set of features: http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,719,1185&Prod=NEXYS4 | 14:27 |
olofk | Hopefully I can reuse much of the stuff that _franck_ is doing for the de1 | 14:27 |
knz | for the de0, is the multi-touch kit the only workable console option at the moment? | 14:28 |
olofk | Isn't there a UART in the same cable as the blaster? | 14:37 |
knz | that would be convenient but I haven't seen it in the specs (will re-check) | 14:38 |
stekern | no, theres only jtag in that, nios ii designs on that board use the "jtag-uart" | 15:20 |
Powermaniac | Amadiro: O_o keep finding people from #learnprogramming and ##programming everywhere | 16:49 |
Powermaniac | Oh and hi everyone | 16:49 |
knz | hi | 16:49 |
Powermaniac | A person replied for once, yes! | 16:50 |
Powermaniac | Okay knz do you have a lot of experience with OpenRISC/OpenCores? | 16:51 |
Powermaniac | I ask because I'm completely new to this and hoping someone can point me in the right direction. | 16:52 |
mschulze | Hi Powermaniac! | 16:52 |
Powermaniac | Hey mschulze! | 16:52 |
Powermaniac | Mschulze maybe you can help? | 16:53 |
mschulze | I read your questions on the opencores channel. But I don't understand exactly what you are planning to do. | 16:53 |
Powermaniac | Well I sort of want to make an open hardware pc | 16:54 |
mschulze | Do you want to by a complete board that is abled to do all that things? | 16:54 |
Powermaniac | Well a complete board or parts and put it together myself | 16:54 |
mschulze | Or are you happy with an FPGA board? | 16:54 |
Powermaniac | That's the thing from what I understand you can get the OpenRISC 1200 processor which is open source. But you can't get a FGPA board that is open source to put it on.... | 16:56 |
Powermaniac | Right? | 16:56 |
Powermaniac | And the OpenRisc can also supposedly run Linux... | 16:56 |
mschulze | I managed to run linux on a DE0-nano board from terasic and I think SD card and VGA is possible. | 16:57 |
stekern | there are open source fpga boards, as in, the pcb layout is open source | 16:57 |
Powermaniac | Stekern, isn't there a chip on a FPGA board that does all the work though? | 16:57 |
mschulze | The Linux port is in the official sources since 3.1 | 16:57 |
stekern | all the things you mentioned in #opencores are possible (although we don't have a debian distribution) on an FPGA board | 16:58 |
stekern | well, the fpga, naturally | 16:58 |
stekern | there aren't really any open source fpgas, and the tools for them are all closed source | 16:58 |
mschulze | Keyboard and Mouse should be easy with the USB core, for ethernet you will need a ethernet PHY | 16:59 |
stekern | good old ps/2 works too | 16:59 |
stekern | but an fpga board will probably not give the performance you are imagining | 17:00 |
Powermaniac | Yeah I was reading there are supposedly no fully open source FPGA boards.... | 17:00 |
mschulze | The "chip that does all the work" is the FPGA containing the OpenRISC cpu ;-) | 17:00 |
stekern | (that's of course just a guess on my part) | 17:00 |
Powermaniac | Well at maximum I might have it sit as a cjdns node...for a meshnet | 17:01 |
Powermaniac | But I need a Linux distribution to be able to setup the system | 17:01 |
mschulze | I think there was something about "up to ~150 MHz" for Cyclone III FPGAs | 17:01 |
stekern | you can run Linux without a distribution | 17:02 |
Powermaniac | The cjdns system I mean | 17:02 |
Powermaniac | The Papilio FPGA boards claims to be open source | 17:04 |
Powermaniac | But it contains a Xilinx chip | 17:04 |
mschulze | Well, I don't know the cjdns system. Are you aiming for high server load? | 17:04 |
mschulze | Are you looking for an open source FPGA? | 17:04 |
Powermaniac | Mschulze not really, as currently in Australia I'm one of the only people on Hyperboria the rest are scattered elsewhere. | 17:05 |
Powermaniac | Mschulze essentially I want an open source computer | 17:05 |
Powermaniac | Well open hardware not just software | 17:05 |
Powermaniac | As I sort of also wish to learn from it all | 17:06 |
Powermaniac | And get to understand how all of it works, so eventually I can try to improve it, if my abilities allow | 17:07 |
mschulze | I think then you'll need to setup a complete chip design... FPGA chips are closed hardware as far as I know. | 17:08 |
Powermaniac | So I have a feeling I don't really understand what I'm talking about yet | 17:09 |
Powermaniac | And I'm wondering can you put say the OpenRISC onto an Arduino type setup? | 17:09 |
Powermaniac | Or some other setup as Arduino isn't actually entirely open source either | 17:10 |
mschulze | You could have an open specification for a board and for connection for shields. But the FPGA silicon desing would still be closed source. | 17:12 |
mschulze | The OpenRISC processor with all of it's peripherals are open source, you compile it and put the design into the FPGA | 17:14 |
Powermaniac | So no way around having an FPGA or not hmm | 17:14 |
Powermaniac | So okay where can I actually buy an OpenRISC and peripherals? | 17:15 |
mschulze | You could use an ASIC, but the silicon process and the fitting tools still are closed source. | 17:16 |
Powermaniac | Ahh okay | 17:17 |
mschulze | You don't by an OpenRISC. It's an open hardware design. | 17:18 |
mschulze | Download the toolchain and the OpenRISC sources, you'll need to do some programming, and then you compile it and run it on an FPGA board. | 17:19 |
Powermaniac | Wait so it's not an actual chip? | 17:19 |
mschulze | That's the big picture. | 17:19 |
Powermaniac | Okay I've really confused myself here | 17:19 |
mschulze | No, it's not an actual chip :-) | 17:20 |
Powermaniac | Wait does that mean there areen't any design sheets that give you schematics to manufacturer one? | 17:20 |
mschulze | The FPGA is the chip. You load the OpenRISC design into the FPGA and it works as OpenRISC. | 17:20 |
Powermaniac | Like is there enough information to manufacturer a chip from that information? | 17:21 |
mschulze | Or you give the design to an ASIC manufracturer that will make you some hundred thousands and you have your "OpenRISC chip". But that's a bit expensive | 17:22 |
Powermaniac | Okay so now I'm wondering do any actual processor chips exist that are open source, as now I'm kind of puzzled. | 17:22 |
mschulze | The ASIC production still isn't a standard silicon process but rather a mask programming of the ASIC chip. | 17:27 |
Powermaniac | So you can't go to say an ASIC manufacturer and say I want a chip made like this and give them the schematics etc.? | 17:32 |
Powermaniac | Wait what is the OpenSPARC then? | 17:34 |
mschulze | I don't know the OpenSPARC, sorry. | 17:39 |
stekern | you can go to an ASIC manufacturer with the sources to openrisc and tell them to make a chip out of it (overly simplified, but true) | 17:40 |
Powermaniac | Stekern, I'm assuming the catch is it will cost me an arm and a leg right? | 17:40 |
hno | mschulze, OpenSPARC is the SPARC platform. Sun Microsystems released it under a open license before Oracle bought them. | 17:40 |
stekern | Powermaniac: I don't think your arms and legs are worth enough to do it ;) | 17:41 |
Powermaniac | Hmm | 17:41 |
Powermaniac | Seems like I'm up shit creek without a paddle... | 17:42 |
stekern | but to get an open source FPGA, you'd need to do an ASIC of that too, so you're back to square one | 17:42 |
hno | OpenSPARC is a little bigger design than or1200. | 17:42 |
stekern | but once in a while people come in with the same "problem", for you, what is the value of the actual chip making process being open? | 17:43 |
mschulze | I would say: go, get an FPGA board of your choice that is already supported by the ORPSoCv2 and give it a try. You will learn a lot about open source hardware then. | 17:43 |
stekern | I'm not saying there wouldn't be value in it, but the key here is for *you* | 17:44 |
mschulze | Doing a silicon desing by yourself is a really big thing. | 17:45 |
Powermaniac | Well I wanted to have the option to read about how it works, what's in it etc. And then one day (eventually Uni will happen) I might be able to improve thee designs | 17:45 |
stekern | you still can do that | 17:47 |
stekern | the CPU design is open source | 17:49 |
Powermaniac | Huh? Are you suggesting FPGA or ASIC or? | 17:49 |
stekern | we already established that you doing an ASIC wasn't feasible, so FPGA | 17:50 |
Powermaniac | Originally this also seemed like a cheap venture to have some fun with before getting into it further. Now I have a feeling it won't be so cheap... | 17:50 |
stekern | FPGA boards aren't very expensive | 17:50 |
Powermaniac | Was looking at the Olimex boards, and RaspberryPi and Pandaboard etc. | 17:51 |
stekern | yes, but those do *not* feature open source cpu designs ;) | 17:51 |
Powermaniac | True | 17:52 |
Powermaniac | Although Olimex claims otherwise | 17:52 |
Powermaniac | Ha | 17:52 |
stekern | no, I believe they claim the PCB designs are open, which they probably are | 17:53 |
stekern | I mean, if you're going to be religious about it then you'd need to open source the process of making plastic too... | 17:54 |
Powermaniac | Can't you technically find how anyone makes plastic easily on the net though? | 17:56 |
Powermaniac | Anyway. | 17:57 |
Powermaniac | Recommend me a FPGA board please | 17:57 |
Powermaniac | As I think that is the closest I'm ever going to get without spending a fortune. | 17:58 |
mschulze | Try the DE0-nano, get it from farnell but not directly from Terasic. | 17:58 |
mschulze | You will have a lot of fun with it :-) | 17:58 |
mschulze | It has 32MB of ram but you will need to build a additional board for SD card and ethernet phy. | 17:59 |
mschulze | If you got some more money to spend, then look for the DE2-115 | 18:00 |
Powermaniac | Oh okay | 18:00 |
mschulze | That has everything you are looking for, including ethernet and SD card slot. | 18:01 |
hno | The SoCKit discussed earlier might also be interesting. But likely needs a bit of effort to get orpsoc running on it when it becomes available. | 18:09 |
Powermaniac | Uno: ? | 18:13 |
Powermaniac | Ffs | 18:13 |
Powermaniac | Hno: SoCKit? | 18:13 |
hno | http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=165&No=816&PartNo=1 | 18:15 |
Powermaniac | Ahh | 18:19 |
mschulze | That board needs to do a journey from taiwan into my hands... | 18:23 |
mschulze | The terasic site makes me beleaving it's available... | 18:30 |
mschulze | Oh no, preorder... :-( | 18:31 |
Powermaniac | Well I'm finally going to leave you all alove | 18:32 |
Powermaniac | Alone | 18:32 |
Powermaniac | Thanks all for the help | 18:32 |
hno | mschulze, Arrow says it is in stock. http://parts.arrow.com/item/detail/arrow-development-tools/sockit | 18:37 |
mschulze | I'm thinking of a linux running on the arm core loading an linux image onto a multicore openrisc processor in the fpga side... :-D my brain is running hot now. That board looks awesome. | 18:40 |
mschulze | It's linux all the way down. | 18:41 |
hno | you probably want some daughterboards as well to make some interesting I/O. Those HSMC connectors is not exactly something you plug wires to.. | 18:46 |
stekern | mschulze: I have had similar thoughts, using the arm cores to cross compile stuff for the openrisc core etc | 18:47 |
stekern | I have one of those on my table here, just waiting for me to show it some love... | 18:48 |
mschulze | if we could get quartus running on the arm core we could dynamically adopt the fpga design :-D | 18:48 |
mschulze | stekern will you be there at the ORCONF this year? | 18:49 |
stekern | yes, that's the "showstopper" to get a full development machine on the devboard | 18:49 |
hno | you could probaly use the ARM as your desktop even.. with only a little help from the FPGA side to provide a framebuffer. | 18:49 |
stekern | even cooler would of course be to have the altera tools running on openrisc... ;) | 18:50 |
stekern | mschulze: I'll be there, yes | 18:50 |
hno | if you accept to temporarily loose your monitor output each time you reprogram the fpga. | 18:50 |
mschulze | then could you please bring that board with you? i really would like to take a look on it, because we are looking for a arm+fpga board for lab work at my university | 18:52 |
stekern | sure, I'll bring it, I'm also hoping I have a orpsocv3 port for it by then | 18:53 |
stekern | or at least running openrisc on it in some way | 18:53 |
mschulze | You should be abled to see my smile... | 18:54 |
mschulze | One of my goals is an dual core architecture on my DE0-nano, one core running linux and the other core running some real time stuff, both together bringing my quadcopter into the air. | 18:57 |
mschulze | But I fear that the board cannot hold two OpenRISC cores. | 18:57 |
hansfbaier | mschulze: It might work | 19:15 |
hansfbaier | I run linux on an EP4CE10 | 19:16 |
hansfbaier | that has half the LUTs of the DE0_nano | 19:16 |
mschulze | Yes, but I'll need some space for the SD card controller and a connection to a WLAN card. | 19:17 |
hansfbaier | mschulze: Yes the sd controller eats quite a bit of space. Do you run the sd controller from orpsoc? I get errors When I use it | 19:19 |
hansfbaier | mschulze: How did you get it working? | 19:19 |
hansfbaier | mschulze: I use sd with SPI. Very economical. But terribly slow | 19:20 |
mschulze | Err... I still have to get it working... | 19:20 |
mschulze | At the moment I am doing a lot of work on another level, you will get more mails on it at the mailing lists this week. | 19:21 |
mschulze | How do you manage the copyright statements in your code files? There are some essential things that we don't learn on university... | 19:43 |
mschulze | Do I have to change the year each year in each file? | 19:45 |
stekern | mschulze: that's a good question, I usually just change it on files I change | 20:21 |
olofk | I think that's the standard procedure. Update the copyright year when you do changes to a file | 20:30 |
mschulze | Okay, thanks. Thats a bit funny, we learn how to make software, but we don't learn how to publish it correctly in the real world... | 20:41 |
mor1kx | [mor1kx] skristiansson pushed 2 new commits to master: https://github.com/openrisc/mor1kx/compare/9e488243d397...b5ca2ea80854 | 20:43 |
mor1kx | mor1kx/master fc65949 Stefan Kristiansson: mor1kx-defines: whitespace cleanup | 20:43 |
mor1kx | mor1kx/master b5ca2ea Stefan Kristiansson: mor1kx v1.0 | 20:43 |
stekern | olofk: ^ | 20:43 |
mschulze | mor1kx just joyned to tell us that there are new commits? | 20:46 |
stekern | yes, but that wasn't the significance of it | 20:47 |
olofk | stekern: Now that deserves a few beers and a tweet! | 20:48 |
olofk | And gives me a reason to add support for getting tagged releases in orpsocv3 | 20:49 |
mschulze | because we have version 1.0? | 20:49 |
stekern | I've already enjoyed a beer, perhaps I'll have another one just for the occasion | 20:49 |
stekern | =) | 20:49 |
stekern | mschulze: yes, we are notoriously bad at making releases and olofk have been bugging us (and I have been bugging juliusb) that we should make a mor1kx release | 20:50 |
mschulze | I thought this is about free software and now you tell me that it is payed in beer :-) Congrats! | 20:50 |
olofk | mschulze: It's not alcohol free software, if you thought that :) | 20:52 |
stekern | so, we decided to not make so much fuss about it and just put the v1.0 tag on what we have now | 20:52 |
stekern | juliusb: since I got to do the tagging, will you do the honours of a small ml announcement? | 20:53 |
stekern | there's your chance to steal back some of the celebrity (and perhaps the groupies) =) | 20:54 |
olofk | Ah crap. I forgot to send out on the ml that orpsocv3 was released | 20:54 |
mschulze | orpsocv3 is released? but v2 is not totally obsolete now, is it? | 20:55 |
olofk | mschulze: Not at all. orpsocv3 s not on feature parity with orpsocv2 yet, and there aren't any board ports at all right now | 20:56 |
olofk | But it works well enough to slap a release tag on it | 20:56 |
mschulze | Okay, that means I have to migrate my DSL to v3 very soon. It's getting overwhelming now. | 20:59 |
olofk | mschulze: What does your DSL do? I probably haven't understood really what's it about | 21:00 |
mschulze | It can generate the verilog files for the wishbone bus and toplevel entity and the tcl scripts for quartus at the moment. | 21:02 |
olofk | That sounds like an almost perfect match for orpsocv3. Top-level generation and things like TCL scripts are two tasks that I have left for other tools to take care of | 21:03 |
olofk | What do you mean with verilog files for the wishbone bus? | 21:03 |
mschulze | :-D | 21:03 |
olofk | Like arbiters and things like that? | 21:03 |
mschulze | Yes, the arbiters. | 21:04 |
olofk | I'm almost done with my interconnect generator. We should definitely talk about how to integrate these two efforts at orconf | 21:04 |
mschulze | I don't like to make changes in four or more files just for adding a single IP core | 21:05 |
stekern | I'm very interested in the top-level generation | 21:05 |
olofk | People generally are interested in automating top-level files, so I felt that I didn't want to make another half-assed attempt to do it myself. Looks like I was right :) | 21:06 |
mschulze | And it is said that it will be possible to make a graphical editor for Eclipse. Now think of an integrated toolchain and we are done... | 21:06 |
stekern | from a user perspective, that's perfect | 21:06 |
stekern | but I assume that it's possible to drive it from command line as well? | 21:06 |
mschulze | yes for the generation part. | 21:07 |
mschulze | that war one reason why I have chosen Xtext because I know that people need to automate thair builds | 21:08 |
mschulze | (need some IRC whiteout, sorry for bad spelling) | 21:10 |
stekern | you probably won't beat me in that department, so no worries | 21:10 |
stekern | but yeah, automated makefile based builds are what makes us nerds happy ;) | 21:12 |
mschulze | yes I do. and I'm geting nervous, you will have a talk from me on ORCONF | 21:12 |
_franck_ | mschulze: add a debugger to that and you'll have a perfect environnement | 21:13 |
_franck_ | you can easily integrate eclipse with openocd | 21:13 |
mschulze | _frank_: that is my goal for the next years. | 21:13 |
stekern | yeah, I really like the thought of that kind of unified IDE | 21:14 |
_franck_ | we should also try to compile our toolchain under cygwin | 21:14 |
stekern | I'm perhaps not seeing myself using the guiy things, but it's a huge leap for users | 21:14 |
mschulze | I learned the Nios 2 processor at university but was not happy with that expensive thing... | 21:15 |
_franck_ | if we have the nios2 EDS equivalent for openrisc we'll get a lot more interest | 21:15 |
stekern | I agree | 21:15 |
olofk | Me too. We need more eye candy to make people interested | 21:16 |
mschulze | You cannot teach SoPC basics with complete textmode tools | 21:17 |
_franck_ | I've always thought of a OpenQSYS :) | 21:17 |
olofk | One of the reasons that I scrapped my initial makefile-based orpsocv3 was that it would be a pain to do some GUI interface for that | 21:18 |
olofk | Now that was a redundant interface | 21:18 |
mschulze | Integrating a good makefile build into eclipse is not that hard. | 21:19 |
mschulze | In my oppinion it could lead to one IDE where you can do everything from hardware design over the C/C++ project up to linux configuration. | 21:21 |
olofk | But for orpsoc it probably would be hard as it's not only about building stuff | 21:22 |
olofk | orpsocv3 is quite differet from orpsocv2 in that regard | 21:22 |
mschulze | Okay, I will do what I can to look at v3 so that I can get an idea how I can integrate into in future | 21:23 |
mschulze | I have to leave now but sure be back in the next days. I'll have my final exam this week and than heading for a first release on github. | 21:26 |
mschulze | Good night :-) | 21:28 |
_franck_ | night | 21:29 |
stekern | too slow ;) | 21:32 |
_franck_ | openrisc and jtag_vpi are now pushed to gerrit (openocd), just have to wait (for a long time....) now | 21:33 |
stekern | \o/ | 21:34 |
olofk | _franck_: That's great. Do you have a URL where we can see the progress? | 21:34 |
stekern | I have the fun task of cleaning up my store buffer work in front of me | 21:34 |
stekern | the backside of my messy development model | 21:35 |
_franck_ | olofk: http://openocd.zylin.com/#/q/status:open,n,z | 21:37 |
stekern | so that's the second on my list before sockit on orpscov3, the first was to do the mor1kx release tag | 21:37 |
_franck_ | stekern: great to here you'll do the job for us on sockit ;) | 21:37 |
_franck_ | s/here/hear | 21:38 |
stekern | that the Linux spi driver rework just swooped in and took the first place for a while was all hansfbaiers fault =) | 21:39 |
olofk | _franck_: Thanks. | 21:39 |
stekern | _franck_: is that tracking patches on the ml or how do you "push to gerrit"? | 21:40 |
_franck_ | I "git push review" to gerrit | 21:41 |
stekern | ah, I see | 21:41 |
stekern | nifty | 21:42 |
stekern | I'm completely lost when it comes to gerrit ;) | 21:42 |
olofk | stekern: Yeah, that's an old git trick. We git-pros use it all the time | 21:42 |
stekern | haha, you take all the chances you can, don't you ;) | 21:43 |
olofk | I'm trying so hard :( | 21:43 |
_franck_ | me too to be honest, I just followed this: http://openocd.sourceforge.net/doc/doxygen/html/patchguide.html | 21:43 |
stekern | but I believe that is completely unrelated to git actually | 21:43 |
_franck_ | I just simple commands and when it's too complicate to handle, I just pull somewhere else and redo my changes :) | 21:44 |
_franck_ | *use | 21:44 |
stekern | you just push it to a server that is linked to gerrit | 21:45 |
_franck_ | yes | 21:45 |
--- Log closed Mon Sep 02 00:00:38 2013 |
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