IRC logs for #openrisc Thursday, 2013-08-01

--- Log opened Thu Aug 01 00:00:52 2013
stekernolofk: yeah, it'02:31
stekerns one of the worst "let the programmer shoot himself in the foot" I know of02:31
stekernusually I enjoy shooting myself in the foot02:32
jeremybennettolofk: Aim central. We haven't got the venue confirmed, but its unlikely to be far out of town. There is a Youth Hostel pretty close to the centre, and a range of hotels. Look up B&B in Cambridge on Google is probably best.07:16
nvmindgood morning07:18
nvmindwell... or whatever based on your timezone :)07:19
stekernmorning nvmind07:29
nvmindI was about to build the toolchain for openrisc but I am a bit07:35
nvmindconfused on which instruction should I follow07:35
nvmindif those on the wiki or those on openrisc.net07:36
nvmindwhich is the preferred way :) ?07:39
stekernif you are building the or1k toolchain, use the wiki instructions07:40
stekernis it a baremetal or linux toolchain you intend to build?07:41
nvmindbaremetal07:48
nvmindI am developing a SoC based on openrisc as part of my thesis07:49
nvmindand I would like to test on the simulator some little kernel07:50
nvmindbefore simulating its execution with icarus :)07:50
nvmindmy final goal is to add SoC generation to a HLS tool developed in my university07:52
juliusbnvmind: hi, which tool is that?10:23
nvmindjuliusb: http://panda.dei.polimi.it10:27
nvmindjuliusb: but the release published is really old :)10:29
juliusbah OK10:29
nvminddo you know it?10:29
juliusbno, never seen it before10:30
juliusbso you're thinking of generating the SoC top-level?10:30
juliusbwhat description files are you thinking of using? If you used something like IP-XACT that would be extremely interesting...10:30
nvmindyes and attach to the bus accelerator generated by the framework staring from plain C10:31
nvmindYes part of the work is to write IP-XACT description of components10:32
juliusbbus accelerator? you mean just a usual bus switch thing?10:32
nvmindno... hw accelerator10:33
nvmindC function translated to verilog :)10:33
nvmindwith the HLS framework10:33
juliusbOK, but the Verilog of the bus thing, that will just be a usual Wishbone thing or will you do ARM AMBA?10:34
nvmindwishbone :)10:35
juliusball sounds good so far :)10:35
nvmindwe really like Open Hardware :)10:35
juliusbhow long do you have for this project?10:35
nvmindwell I should be in a position that within a couple of months of full time work I should have a working prototype10:37
nvmindbut I am working on the stuff that is building this thing up since a year.10:41
juliusboh great10:41
nvmindhttp://mminutoli.github.io/howto-build-an-openrisc-toolchain.html12:11
nvmindany comment (technical or stylistic) is welcome :)12:11
juliusbdid that work for you?12:13
nvmindyes12:13
juliusbexcellent12:13
juliusbyou know in the prefix you can put $USER for <user> and it should work12:16
juliusbor $HOME/....12:16
juliusbbecause I'm sure you'll find people copy and paste that and it doesn't work12:16
nvmindright!12:16
juliusbso I'd add a command to make the install dir , ie. mkdir $HOME/or1k-toolchain12:17
juliusbthen change the prefixes to that, too12:17
olofknvmind: I'm working on some wishbone tools as part of ORPSoCv3. We might benefit from each other's work here.13:24
olofkThe hackRF kickstarter is looking really good. http://www.kickstarter.com/projects/mossmann/hackrf-an-open-source-sdr-platform13:27
win2mac_hey there15:11
nvmindhi15:46
nvmindolofk: I will be more than happy :)15:47
stekernlooks like I'm not going to be able to make it the 12th after all...17:05
jeremybennettstekern: That's a shame17:31
juliusbah no :(18:01
stekernyeah :(18:43
olofkhttp://orconf.org21:02
--- Log closed Fri Aug 02 00:00:53 2013

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