--- Log opened Thu Jun 13 00:00:41 2013 | ||
--- Log closed Thu Jun 13 01:37:41 2013 | ||
--- Log opened Thu Jun 13 01:37:57 2013 | ||
-!- Irssi: #openrisc: Total of 21 nicks [0 ops, 0 halfops, 0 voices, 21 normal] | 01:37 | |
-!- Irssi: Join to #openrisc was synced in 24 secs | 01:38 | |
stekern | yay a "lleHow o dlrmorf1RA" | 02:26 |
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stekern | I probably need to swap the bytes :) | 02:27 |
olofk | stekern: Congratulations! | 06:10 |
olofk | I thought you had rot-13 encrypted it, before I saw that it was byte-swapped :) | 06:11 |
stekern | I'm still having troubles with my handshaking between the cpus, so we still don't know much about it, but at least it's able to execute code on my command now ;) | 06:14 |
olofk | SPR contents, or it didn't happen ;) | 06:27 |
stekern | exactly, that's what I failed to get this morning :( | 06:34 |
stekern | silly me, why am I trying to get the data over to the arm processor to print it when ar100 have direct access to uart0? | 13:04 |
stekern | SPR_VR = 0x12000001 | 13:04 |
olofk | Woohoo! | 13:13 |
stekern | some more: http://pastie.org/8039127 | 13:20 |
olofk | This damn overambitious Web Filter at work won't let me access pastie | 13:28 |
stekern | pasted it in a query, just for you ;) | 13:29 |
stekern | so it has a 4K icache | 13:29 |
stekern | no dcache | 13:29 |
olofk | It has previously denied me access to gcc.gnu.org since that was categorized as Computers/internet, and access to the provider of our FPGA boards since that was categorized as business | 13:29 |
olofk | stekern: Thanks. With this information I can build my own A31 SoC, sell it at a lower price and force them out of business! | 13:31 |
olofk | Ok, so if it's probably a version older than rev 808, which would mean that they haven't fixes for exceptions in delay slots | 13:39 |
olofk | It seems that the big companies using or1200 chooses the released versions instead of the ones from SVN. | 13:39 |
stekern | and I thought our web filters were overambitous when they classified wireshark as "hacking tools" | 13:41 |
stekern | we should just put what's in SVN now out as a release, that's far more stable than any real release out there | 13:42 |
olofk | I made a branch about a year ago with the intention of gathering a proper changelog from the v2 release | 13:43 |
olofk | That turned out to be a suicide mission | 13:43 |
olofk | Thank god that we have some commit hygiene since about a year or two ago at least | 13:43 |
olofk | Hmm.. seems like it's older than rev 258. It seems that we would have to C14 dating to get a more precis age | 13:48 |
stekern | odd... it claims to have an power management unit available (and it's not the bit swap problem with the PIC unit, because that bit is set too) | 13:52 |
olofk | They could have just used their own defines file then | 13:53 |
stekern | I wonder what clock it runs on | 13:56 |
stekern | maybe the 24MHz OSC | 13:56 |
stekern | it has a timer unit, so would be fairly easy to find out | 13:57 |
olofk | Check with a for loop and a stop watch? | 13:57 |
olofk | oh... ok, that's probably a better solution :( | 13:57 |
stekern | I can check that against how long it takes to transmit 1 character with the uart | 13:58 |
olofk | Have they named the core AR100, or where does that name come from? | 14:00 |
stekern | yes, they have | 14:05 |
stekern | http://git.rhombus-tech.net/linux?p=linux.git;a=tree;f=arch/arm/mach-sun6i/ar100;hb=4d6537b9e473af95baef30c2cdf232b5253e0640 | 14:07 |
olofk | Still haven't figured out all these restrictions, but isn't that a trademark violation? Or is that the other way around, when they call something OpenRISC that is not | 14:08 |
stekern | I think that's their internal naming of it | 14:09 |
stekern | and I think it's the other way around | 14:10 |
stekern | and OpenRISC is afaik not even trademarked | 14:11 |
olofk | OpenRISC is trademarked | 14:11 |
stekern | by who? | 14:11 |
olofk | I read an article on osnews that Google hasn't written Linux anywhere in their marketing. I guess that's roughly the same thing | 14:11 |
olofk | By the owners of OpenCores. At least if I remember things correctly | 14:12 |
olofk | But this seems to indicate otherwise http://trademarks.justia.com/773/78/openrisc-77378063.html | 14:16 |
stekern | I've heard it claimed by a number of people that it's not trademark, latest at the phone conference | 14:21 |
olofk | I need some help debugging a failing test case. It's or1200-except from the orpsocv2 test suite. Line 582 has a comment that says /* Shouldn't trigger MMU */, but it looks like that's exactly what happens | 17:09 |
olofk | So... why? | 17:09 |
olofk | Up until then, the executed log is exactly the same as when I run it in orpsocv2 and it succeeds | 17:10 |
olofk | Aha! The memory was too small | 17:29 |
stekern | subtle | 19:07 |
stekern | hno: I pushed the ar100 hack here: https://github.com/skristiansson/ar100-info if someone else might have use for it ever | 20:28 |
stekern | I even wrote up something about the SRAM address logic in the README =P | 20:29 |
hno | stekern, you got contact? | 21:05 |
hno | Yes you have :) | 21:05 |
hno | stekern, how large is the AR100 SRAM? | 21:13 |
hno | and can it access DRAM? Or only SRAM + I/O? | 21:50 |
--- Log closed Fri Jun 14 00:00:42 2013 |
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