IRC logs for #openrisc Thursday, 2013-06-13

--- Log opened Thu Jun 13 00:00:41 2013
--- Log closed Thu Jun 13 01:37:41 2013
--- Log opened Thu Jun 13 01:37:57 2013
-!- Irssi: #openrisc: Total of 21 nicks [0 ops, 0 halfops, 0 voices, 21 normal]01:37
-!- Irssi: Join to #openrisc was synced in 24 secs01:38
stekernyay a "lleHow o dlrmorf1RA"02:26
stekernI probably need to swap the bytes :)02:27
olofkstekern: Congratulations!06:10
olofkI thought you had rot-13 encrypted it, before I saw that it was byte-swapped :)06:11
stekernI'm still having troubles with my handshaking between the cpus, so we still don't know much about it, but at least it's able to execute code on my command now ;)06:14
olofkSPR contents, or it didn't happen ;)06:27
stekernexactly, that's what I failed to get this morning :(06:34
stekernsilly me, why am I trying to get the data over to the arm processor to print it when ar100 have direct access to uart0?13:04
stekernSPR_VR = 0x1200000113:04
olofkWoohoo!13:13
stekernsome more: http://pastie.org/803912713:20
olofkThis damn overambitious Web Filter at work won't let me access pastie13:28
stekernpasted it in a query, just for you ;)13:29
stekernso it has a 4K icache13:29
stekernno dcache13:29
olofkIt has previously denied me access to gcc.gnu.org since that was categorized as Computers/internet, and access to the provider of our FPGA boards since that was categorized as business13:29
olofkstekern: Thanks. With this information I can build my own A31 SoC, sell it at a lower price and force them out of business!13:31
olofkOk, so if it's probably a version older than rev 808, which would mean that they haven't fixes for exceptions in delay slots13:39
olofkIt seems that the big companies using or1200 chooses the released versions instead of the ones from SVN.13:39
stekernand I thought our web filters were overambitous when they classified wireshark as "hacking tools"13:41
stekernwe should just put what's in SVN now out as a release, that's far more stable than any real release out there13:42
olofkI made a branch about a year ago with the intention of gathering a proper changelog from the v2 release13:43
olofkThat turned out to be a suicide mission13:43
olofkThank god that we have some commit hygiene since about a year or two ago at least13:43
olofkHmm.. seems like it's older than rev 258. It seems that we would have to C14 dating to get a more precis age13:48
stekernodd... it claims to have an power management unit available (and it's not the bit swap problem with the PIC unit, because that bit is set too)13:52
olofkThey could have just used their own defines file then13:53
stekernI wonder what clock it runs on13:56
stekernmaybe the 24MHz OSC13:56
stekernit has a timer unit, so would be fairly easy to find out13:57
olofkCheck with a for loop and a stop watch?13:57
olofkoh... ok, that's probably a better solution :(13:57
stekernI can check that against how long it takes to transmit 1 character with the uart13:58
olofkHave they named the core AR100, or where does that name come from?14:00
stekernyes, they have14:05
stekernhttp://git.rhombus-tech.net/linux?p=linux.git;a=tree;f=arch/arm/mach-sun6i/ar100;hb=4d6537b9e473af95baef30c2cdf232b5253e064014:07
olofkStill haven't figured out all these restrictions, but isn't that a trademark violation? Or is that the other way around, when they call something OpenRISC that is not14:08
stekernI think that's their internal naming of it14:09
stekernand I think it's the other way around14:10
stekernand OpenRISC is afaik not even trademarked14:11
olofkOpenRISC is trademarked14:11
stekernby who?14:11
olofkI read an article on osnews that Google hasn't written Linux anywhere in their marketing. I guess that's roughly the same thing14:11
olofkBy the owners of OpenCores. At least if I remember things correctly14:12
olofkBut this seems to indicate otherwise http://trademarks.justia.com/773/78/openrisc-77378063.html14:16
stekernI've heard it claimed by a number of people that it's not trademark, latest at the phone conference14:21
olofkI need some help debugging a failing test case. It's or1200-except from the orpsocv2 test suite. Line 582 has a comment that says /* Shouldn't trigger MMU */, but it looks like that's exactly what happens17:09
olofkSo... why?17:09
olofkUp until then, the executed log is exactly the same as when I run it in orpsocv2 and it succeeds17:10
olofkAha! The memory was too small17:29
stekernsubtle19:07
stekernhno: I pushed the ar100 hack here: https://github.com/skristiansson/ar100-info if someone else might have use for it ever20:28
stekernI even wrote up something about the SRAM address logic in the README =P20:29
hnostekern, you got contact?21:05
hnoYes you have :)21:05
hnostekern, how large is the AR100 SRAM?21:13
hnoand can it access DRAM? Or only SRAM + I/O?21:50
--- Log closed Fri Jun 14 00:00:42 2013

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