IRC logs for #openrisc Tuesday, 2013-04-23

--- Log opened Tue Apr 23 00:00:27 2013
-!- Netsplit *.net <-> *.split quits: simoncook, jeremybennett_00:25
-!- Netsplit over, joins: jeremybennett_, simoncook00:30
mor1kx[mor1kx] skristiansson pushed 4 new commits to master:
mor1kxmor1kx/master 32e675c Stefan Kristiansson: cappuccino/fetch: remove debug printout02:54
mor1kxmor1kx/master 0d75b5c Stefan Kristiansson: cappuccino/fetch: remove superflous check for ctrl_branch_exception_i...02:54
mor1kxmor1kx/master b31f163 Stefan Kristiansson: cappuccino/lsu: register dbus_err_i in lsu instead of dcache02:54
stekernthe 5000 treshold is broken, down at 497002:55
stekernjuliusb: as you might have noticed, I have moved a fair amount of instruction decode logic from the other modules into mor1kx_decode, and I have came to believe we should strive to have _all_ the decode logic in that module and only use single bit control signals in the other modules04:44
stekernthe reasons are: 1) for cappuccino, having the signals registered improves performance04:47
stekern2) most of the area in the design is used on comb logic (i.e. we don't actually use so many registers), in most FPGAs this means we get a lot of LUT only "slices"/LCs04:49
stekern3) a thing you said on the conference call when talking about or2k rings in my head (roughly quoted): "you basically just need to swap out the decoder"04:51
stekern... and as a step towards that, I've prepared this patch:
mor1kx[mor1kx] skristiansson pushed 1 new commit to master:
mor1kxmor1kx/master 1312ec8 Stefan Kristiansson: cappuccino/ctrl: remove flag write to esr...10:02
stekern^ I love when bugs just accidently get fixed10:03
@juliusbstekern: regarding your patch...10:04
@juliusbi think that's fine....10:04
stekern...but? =P10:05
@juliusbah just checking,  I haven't had a good look at it10:05
@juliusbi assume it works OK?10:06
stekernit does exactly the same as the old code, just in a bit fewer lines10:07
@juliusbthen that is great :10:08
stekernbut I'm more interested in your input on the higher level thoughts on moving stuff into mor1kx_decode10:10
@juliusbno that seems fine10:10
@juliusbit's the best design practice10:10
@juliusband, yes, ideally, it'd be nice to support a new architecture by just dropping in a new decode unit but in reality it's probably going to be more than that haha10:10
stekernheh, most definetly, but if you can make it as close to that as possible, I think it'd be good10:11
@juliusband anyway, the all-decode-in-the-decode-stage thing is what I intended to do but just got lazy sometimes, like when I needed a signal speculatively, and couldn't be bothered routing it through, and never cleaned it up later10:12
@juliusbi agree, for an or2k implemetnatnio it'd be great to piggy-back of the mor1kx stuff10:12
stekern(lazy) I kind of suspected that that had happened in some cases, because I've done that too ;)10:13
stekernback to the patch I just pushed, it fixes a bug I've noticed in Linux, basically 'top' would always segfault/crash after a while.10:16
stekernI haven't bothered with investigating that bug yet, because I know it'd be extremely painful to debug, since 1) it's in userspace and 2) it was undeterministic10:16
stekernI poked at the flag to esr work-around just to see if it's really needed anymore and if I could save a bit of logic by removing it10:18
stekernand 'bam' the bug is gone ;)10:18
stekernand I also have a good explanation why it creates a bug, which is comforting, so it's just not a circumstancial thing10:19
@juliusbwhen flag is being set when we get an exception for some reason adn we write it straight to ESR?10:19
stekernyes, but that's not needed in cappuccino anymore, since that instruction will always be rerun10:19
@juliusbok cool10:20
stekernov writing to esr is still needed though, since that can cause the exception by itself10:22
stekernat least I think that was the consensus of a discussion we had earlier, that you want the OV bit set in ESR when entering the exception10:23
stekernnot sure about carry, have to give that a deeper thought, left that in there for now10:24
@juliusbno probs10:25
stekernan addc in a delay slot could potentially be troublesome with the carry->esr i guess10:27
stekernI guess we need a; l.sf test with timer hammering to trigger the bug I just fixed too10:30
@juliusbhmm, i thought we had a test a bit like that10:37
stekernI don't think we have any test with l.sf in delay slots of l.bf10:46
@juliusbohh right10:46
@juliusbsorry im with you10:46
@juliusb(tired today, also concentrating to day job :) )10:46
stekernmakes us two ;)10:46
mor1kx[mor1kx] skristiansson pushed 1 new commit to master:
mor1kxmor1kx/master 0630708 Stefan Kristiansson: execute_alu: simplify stall logic for multicycle ops11:19
stekernman, I really enjoy looking at that 'top' not crashing ;)16:37
@juliusbit's the simple things in life16:44
stekernso true17:09
mor1kx[mor1kx] skristiansson pushed 1 new commit to master:
mor1kxmor1kx/master f50a629 Stefan Kristiansson: decode: replace decode_insn_i[`OR1K_OPCODE_SELECT] with opc_insn...19:10
stekernJonas current tree boots up fine too:
olofkstekern: ahhh... LC is Logic Cells, not Line Count. No wonder you didn't understand when I said you should use ;21:53
--- Log closed Wed Apr 24 00:00:29 2013

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