IRC logs for #openrisc Wednesday, 2013-04-17

--- Log opened Wed Apr 17 00:00:19 2013
stekernah, ok... appeareantöu I really should stop declaring wires in the middle of things, because I (or somebody else) will end up using them above the declaration at some point01:13
stekernapperantly01:14
stekernappearantly =P01:14
mor1kx[mor1kx] skristiansson pushed 2 new commits to master: https://github.com/openrisc/mor1kx/compare/6ad603b83599...882139330e3c01:33
mor1kxmor1kx/master b485103 Stefan Kristiansson: cappuccino/lsu: move dbus_access declaration to top of file01:33
mor1kxmor1kx/master 8821393 Stefan Kristiansson: execute_alu: simplify threestage mul logic01:33
stekern(4000) well, you have to be pick a number, and it's always good to set the bar high01:34
stekernespresso is ~350001:34
stekernbut that's of course without cache and mmu01:34
stekernor1200 is ~470001:34
stekernbut that's with 1-way cache01:34
stekernchanging the cappuccinos caches to 1-way slims it down to about ~500001:35
olofkWhere are the most up to date build instructions for the or1k toolchain?06:50
olofkah.. found it06:51
olofkHmm.. I think I'm doing something wrong. What does this mean? /opt/openrisc/lib/gcc/or1k-elf/4.8.0/../../../../or1k-elf/bin/ld: cannot represent machine `or32'07:34
olofkThis turns up when I'm trying to build the orpsocv2 tests. I'm pretty sure I had that working last time I tried07:36
stekernorpsocv2 is still using the or32 toolchain, no?07:40
olofkI thought it was just to change the toolchain prefix07:40
stekernand you have done that?07:40
olofkI tried a quick grep, but couldn't find any more references to or32 tools07:40
olofkyes07:40
stekernok, exactly where do you get that message?07:41
olofkI mean, it's trying to run or1k-elf-gcc and or1k-elf/bin/ld07:41
olofkmake or1200-basic.elf in sw/tests/or1200/sim07:41
stekernare all the ld scripts updated?07:41
olofkgood question. Probably not07:41
olofkHmm.. where do I find them?07:42
stekernhold a sec07:42
stekernhttp://git.openrisc.net/cgit.cgi/stefan/orpsoc/tree/sw/drivers/or1200/link.ld07:43
olofkthanks07:44
olofkIt works now07:44
stekern\o/07:44
olofkI'm having vacation today, so I hope I can finally get some real work done :)07:45
stekernthat's the spirit07:48
stekerncan't you have concatenated signals in VHDL port maps?07:48
stekernI'm trying to do: my_signal => X"4" & X"2" & X"1",07:49
olofkstekern: No, but you can split the port07:49
olofkmy_signal(3 downto 0) => x"4"07:50
stekernoh, good tip07:50
stekernthat looks nicer too07:50
olofkA word of warning though. You can't leave parts of an output port open. One of VHDL's many amazing features08:26
stekernyeah, I wouldn't expect it to allow me to do that08:28
stekernthe most annoying feature of VHDL must be that hexadecimal values have to be multiples of 408:31
olofkChanged in the latest revision08:34
_franck_it's been improved in VHDL-200808:35
_franck_you can now have S := 6x"0f";  -- specify width 608:35
_franck_http://www.doulos.com/knowhow/vhdl_designers_guide/vhdl_2008/vhdl_200x_ease/08:35
olofkThere's a lot of nice stuff for the next revision. I submitted a feature request to be able to use records in ports with mixed inputs and outputs08:36
stekernnice08:40
stekernwhat kind of tool support is there for VHDL-2008?08:41
stekernI think this design is altera only though08:41
olofkAt least modelsim (questasim) and Synplify has implemented most of the stuff08:42
_franck_http://quartushelp.altera.com/current/mergedProjects/hdl/vhdl/vhdl_list_2008_vhdl_support.htm08:47
_franck_quartus does08:47
stekernyup, I found the checkbox08:48
stekernonce again, ranting in irc is useful ;)08:48
mor1kx[mor1kx] skristiansson pushed 7 new commits to master: https://github.com/openrisc/mor1kx/compare/882139330e3c...01e2b73fceb609:15
mor1kxmor1kx/master c8980f0 Stefan Kristiansson: cappuccino/execute_ctrl: seperate rf_wb and rfd_adr logic...09:15
mor1kxmor1kx/master a337e52 Stefan Kristiansson: cappuccino/ctrl: combine spr_npc, du_spr_npc and du_restart_pc...09:15
mor1kxmor1kx/master 8b9bf5e Stefan Kristiansson: cappuccino/ctrl: fix du_access writes to spr_sr when cpu is stalled...09:15
stekerndown at 5285 LC (it was actually 5368 before, not 5300 like I said)09:17
olofkstekern: I think you get it down to one line. ; is your friend here13:27
stekernolofk: que?13:30
olofkYour quest to make cappuccino the biggest loser13:31
stekernmmm, I kind of got that you were speaking about that, still don't get the ; part13:43
stekernmoron-ekx cappuccino, the biggest loser13:51
stekernI think we need a new pr department...13:51
olofk:)14:32
_franck_olofk, stekern : I'll have an SoCKIT from arrow too ;)14:54
olofk_franck_: Great. Then you can play with all the cool kids ;)14:59
stekernthe sockittens17:05
olofkYes! I love it!17:31
mor1kx[mor1kx] skristiansson pushed 2 new commits to master: https://github.com/openrisc/mor1kx/compare/01e2b73fceb6...97795ec6375b17:32
mor1kxmor1kx/master d50dd8d Stefan Kristiansson: cappuccino/ctrl: use decode_branch_ instead of ctrl_branch_17:32
mor1kxmor1kx/master 97795ec Stefan Kristiansson: cappuccino/ctrl_branch: remove...17:32
--- Log closed Thu Apr 18 00:00:20 2013

Generated by irclog2html.py 2.15.2 by Marius Gedminas - find it at mg.pov.lt!