IRC logs for #openrisc Tuesday, 2013-03-05

juliusb_franck_: right you are, I've never done it but care is taken with that sort of thing AFAIK01:33
-!- You're now known as stekern02:43
--- Log closed Tue Mar 05 14:39:19 2013
--- Log opened Wed Mar 06 12:53:01 2013
-!- Irssi: #openrisc: Total of 26 nicks [0 ops, 0 halfops, 0 voices, 26 normal]12:53
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--- Log closed Wed Mar 06 14:27:29 2013
--- Log opened Thu Mar 07 08:30:28 2013
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stekern_juliusb: that sounds good to me09:36
-!- You're now known as stekern09:36
* stekern is back in cold finland :(09:36
amsstekern: finland rocks10:09
stekernams: yeah, nothing wrong with the country, it's the climate I'm complaining about ;)10:23
juliusbstekern: cool, I'll push stuff at some point soon. I have software breakpoints working for espresso and pronto espresso11:55
juliusband all the carry/overflow stuff11:55
juliusb(but that's already in there)11:55
juliusbi'm wondering if you want me to try and put in the software breakpoint stuff in the cappuccino?11:56
jeremybennettjuliusb: I'm curious - I thought software breakpoints were independent of the architectural implementation?11:57
juliusbI'm still waiting for the ASIC companies to pop  up on east coast Australia, perferrably north of the Queensland/NSW border :) Then I'm over there at the drop of a hat11:57
juliusbjeremybennett: what do you mean by "architectural implementation"?11:57
jeremybennettI mean that I thought GDB just wrote the trap instruction, and that was the same on all OR1K implementations.11:58
juliusbunfortunately in Australia, the only ASIC they know is the Australian Securities and Investments Comission11:58
juliusbjeremybennett: yes, but you stil need to set DSR[TE] and have DRR[TE] asserted when the trap occurs and double check all of the stalling occurs correctly etc11:59
jeremybennettYou mean you are not enjoying this fine British weather. The best cold drizzle in the world here today.11:59
juliusbthat functionality wasn't in the mor1kx yet11:59
jeremybennettAh - that's in GDB terms hardware breakpoints.11:59
juliusbI'm talking about the mor1kx here, by the way.11:59
jeremybennettsoftware breakpoints is where you replace the instruction with l.trap and catch the interrupt that results.12:00
juliusbI'm talking about software breakpoints - GDB inserts a l.trap in the place where it wants to break, saving the original instruction12:00
juliusbbut for that to cause the processor to stall you still need a bit of fancy stuff in the processor RTL12:00
jeremybennettAh - I get you. This is bare metal, so you don't have an interrupt handler.12:00
juliusbI guess so?12:01
jeremybennettYou could make it work without the debug unit, but only with a minimal RTOS to pick up the interrupt.12:01
juliusbif you hit a l.trap without this stuff in, you vector to 0xe0012:01
jeremybennettI've been working on gdbserver for Linux for the last few weeks, so my mindset is elsewhere.12:01
juliusbah right :)12:01
jeremybennettYou could have a handler at 0xe00, but then you would not be truly bare metal. Like a RTOS version of gdbserver I suppose.12:01
juliusbI'm talking making sure GDB's software breakpoint stuff works, because it's handy, and we have no hardware breakpoint support at the moment12:01
jeremybennettThat's good.12:02
juliusbsure, that's a possibility, but this is for baremetal, I guess, as you said.12:02
jeremybennettAlways exciting debugging the debugger.12:02
juliusbThat's one thign which _must_ work12:02
stekernjuliusb: feel free to give adding it to cappuccino a try12:12
stekernatm debugging is completely broken in my working tree12:13
stekernI'll sort that out later when things are remotely stable otherwise ;)12:13

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