IRC logs for #openrisc Wednesday, 2013-02-13

andresjkblueCmd, was that. thanks00:18
andresjkRight now, Im trying to write a simple driver to control a peripheral from linux. Im taking the UART16550 as the model or skeleton and I have instantiated another UART16550. Named UART16550_1. The RTL is done but Im pretty lost at how to access it within linux.00:25
andresjkI have tried to analyze the uart-echo.c and the uart driver that are in sw inside the orpsoc project00:27
andresjkany advices?00:27
_franck_you need to write a device driver00:29
_franck_or you can use mmap00:29
_franck_http://www.armadeus.com/wiki/index.php?title=FPGA_register00:29
andresjknice tutorial. thanks!00:30
andresjk_franck_, so you don't recommend to use the uart drives that are in the orpsocv2 project as a base point?00:32
_franck_is there a linux uart driver ? I'm using this uart and it works with the linux 8250 driver00:34
_franck_I don't know what you want to do with your custom RTL component but I guess you'll need a simple char driver00:35
andresjkyeah thats the first step. then I would use dma00:38
andresjkin the uart driver from orpsoc they use REG8 function00:39
andresjkI believe REG8/16/32 are another way to write00:43
_franck_REG8 is just *((volatile unsigned char *)(add))00:44
_franck_like readb in the kernel00:45
andresjkoh ok00:46
_franck_uart.c in sw/drivers is not a driver you can use in linux00:47
_franck_it is more like a library with functions used in non linux context00:48
andresjkkinda like newlib?00:48
_franck_yes00:48
_franck_do you need to run linux ? if yes, you need a linux driver00:49
andresjkthe one that uses linux is 8250.c, right?00:49
_franck_or, at first use mmap00:49
_franck_yes the linux driver for the 16550 is 8250.c00:49
_franck_but don't waist your time trying to understand how this driver works, this is not what you want00:50
andresjkyeah, well my advisor told me to understand and use the uart as an skeleton for my custom RTL peripheral. So later I can just code the logic in verilog and have the driver to right into the internal registers of the peripheral00:54
andresjkyou say that using mmap its easier?00:55
_franck_you can use mmap to access your RTL from the user's mode. As for the RTL, you can start from the uart but I'm not sure it's the best thing. Why don't you start with a GPIO ?00:58
_franck_https://github.com/Franck79/orpsocv2/blob/master/boards/altera/de1/rtl/verilog/gpio/gpio.v00:58
andresjkyeah, I guess I much easier. One 3 register. 2 for writing and one for reading.01:03
andresjki think I will to that01:03
andresjkdo basically each internal register has a address mapped in memory right?01:04
_franck_yes01:04
andresjkWell, I will start writing my first user-space driver. Thanks a lot. I really really appreciate your help. you took away many of my doubts :)01:09
_franck_you're welcome01:10
_franck_bed time now01:10
_franck_bye01:10
jonibopoke53281: the bugtracker is useless for Linux bugs... nobody checks it... report bugs to linux@lists.openrisc.net11:24
jonibothe bug tracker can be shut down for Linux, AFAIC11:25
blueCmdjonibo: I have two kernel patches, one for TLS and one to implement new atomic functions I need11:26
blueCmdjonibo: what should I do with them and how should they be packaged?11:26
jonibomailing list11:27
jonibouse git send-email, preferably11:28
jonibolinux@lists.openrisc.net is the preferred list11:28
blueCmdnot sure how to use that with gmail11:29
jonibothere's a good howto for that somewhere on the 'net11:30
blueCmdhah found it11:30
jonibogood11:30
blueCmdjonibo: do you want a changelog entry somewhere?11:31
jonibono, no... just patches, please11:31
jonibono changelogs11:31
jonibothat's what git's for11:31
blueCmdgood11:32
blueCmdjonibo: first patch submitted, the other one will follow when I cleaned it up a bit11:39
jonibook11:40
jonibowill take a look when I get a spare moment11:40
blueCmdjonibo: no hurry11:41
blueCmdjonibo: if you have time I would love to have some input on this part: http://08f5a38754babbd2.paste.se/11:41
blueCmdif you think it's worth doing some sort of call table or something, and if it is - where I would place it11:41
joniboyeah, I figured that was what you were up to... can you send that as a patch to the mailing list, too, and we can discuss it via that forum?11:42
blueCmdsure11:42
jonibocan you really use l.sfeqi in the delay slot of a l.bf instruction?  looks suspicious...11:44
blueCmdyep, we talked about that before11:46
blueCmda couple of weeks ago11:46
blueCmdbf will use the flag set on entry11:46
jonibook, cool... that's good to know11:47
jonibothe kernel assembly notation is to prefix delay slot instructions by one space... for readability11:47
jonibojust for info11:48
blueCmdjonibo: yeah, I do that on the other places - I can add it there as well11:49
blueCmdor, I in the kernel I do - I've been sloppy with that in eglibc11:49
joniboI think it's a nice convention... makes the code 10x easier to look at11:50
blueCmdhah, i've been sloppy - never added the UMAX and UMIN11:51
blueCmdjonibo: anyway, you have to messages for approval11:52
jonibook, thanks11:52
Loke_hi13:09
Loke_I'm currently working on a project using the openrisc release of opencores and I'm having an issue. I would apreciate it if someone were to help me13:11
jeremybennettLoke_: what help do you need13:11
Loke_I'm trying to compile c++ code13:12
Loke_but an error in the linker keeps appearing13:12
Loke_in particular, "no memory region specified for loadable section"13:12
jeremybennettwhich toolchain are you using?13:13
Loke_just changed the or1200-elf-gcc for or1200-elf-g++13:13
Loke_the rest is the default toolchain that you have in the Virtual Machine release13:14
jeremybennettI've never come across the or1200-elf toolchain. The only ones I know about are the or32-elf tool chain (the stable tool chain) and the or1k-elf tool chain (the development tool chain).13:18
jeremybennettI don't know who puts together the Virtual Machine release, or how hold it is.13:18
joniboorsoc do and it's more than a year old... AFAIK13:19
jonibodidn't know they had switched the arch to or1200, though...13:19
joniboLoneTech is probably the best person to ask13:20
jeremybennettI suggest you try the stable tool chain from SVN first. It's easy enough to build. If that works OK, then try the development tool chain from git. It should offer more performance, but it is not (yet) so robust.13:20
jeremybennettgood idea of jonibo to ask LoneTech as well.13:20
Loke_Okay, I will ask him and if not solution comes I will move to the stable tool chain.13:21
Loke_Thanks a lot.13:21
jeremybennettDetails on building the tool chains at http://opencores.org/or1k/OpenRISC_GNU_tool_chain#Installation_from_source13:22
Loke_Thanks :)13:22
blueCmdlong shot: any of you guys know any FPGA board with Fibre channel support?14:03
blueCmdI'm not 100% sure what is needed outside of the FPGA and what can be IPs14:03
blueCmdIt might be that it's only the connection to SFP-cages that are needed14:13
_franck_blueCmd: I would say you need a phy15:07
blueCmd_franck_: I tried to read up what constitutes as a PHY on FC but it seems to be the SFP essentialy15:09
_franck_just opened up a phy datasheets and yes, it's SGMII15:11
_franck_so yes, I guess all sfp as a phy inside15:12
blueCmd_franck_: so you say that SFP directly attached to the FPGA would work?15:13
blueCmdbecause then we have the same conclusion :P15:13
blueCmdwhich is nice15:13
_franck_:)15:18
_franck_yes15:18
_franck_you can probably find an altera dev board with an SFP on it15:19
_franck_and you'll have schematics15:19
blueCmdI'll need two, but I found some terasic ones and a couple of other parties15:22
blueCmdwoo, TLS support committed fully17:05
blueCmd_franck_: i'm merging stuff from jonibo's gdb, do you know about the features/-files? I wonder why or32-cpu.xml (or or1k) does not exist - is  it solved in some other nicer way?20:55
jeremybennettblueCmd: The old or32 GDB didn't use the XML features. It will be useful now we have variant architectures (delay/no-delay).21:09
jeremybennettRemember the target is really supposed to supply this information, although it is useful for the client to have a default verison.21:10
blueCmdjeremybennett: ok, so XML is the way to go?21:17
blueCmddoes that have anything todo with CGEN?21:18
blueCmdthe code in git uses CGEN AFAICS but the code i'm merging does not, i guess i want to use cgen?21:18
_franck_yes we want to use CGEN and xml target descriptor22:01
_franck_https://github.com/Franck79/or1k-src/commits/or1k22:01
_franck_I haven't pushed my work to the openrisc repo22:01
poke53281jonibo: Ok, I have send my first small patch to the mailing list.22:02
_franck_the code in my repo uses tdesc22:02
poke53281Let's hope I did it right. I am not really familiar with git22:03
blueCmd_franck_: cool will pull that22:03
_franck_jeremybennett: has inferior function call ever worked in GDB 7.2 ?22:14
_franck_yes it does work, even in GDB 7.5.22:22
blueCmd_franck_: what are you working at?22:24
blueCmdon*22:24
_franck_trying to fix some FAIL in the gdb testsuite22:24
_franck_and learning gdb internals at the same time :)22:25
blueCmd_franck_: cool, i'm debugging why i get a crash in gdbserver, the function i was in was called "inferior" something so I'm just checking :)22:26
blueCmd_franck_: IVe merged your work now, how do I create the xml files?23:27
_franck_I'm getting it from the remote target (openocd). I made openocd auto generate it23:37
_franck_I can give you this file23:38
_franck_http://pastebin.com/zFynJ97k23:39
_franck_this is the file I'm using23:39
_franck_it is send by openocd via RSP protocol23:40
blueCmd_franck_: cool, thanks!23:41
blueCmd_franck_: undefined reference to `or1k32bf_exception', seen that before?23:42
_franck_no23:43
blueCmd_franck_: npc / ppc - whats the diff?23:55
_franck_next and previous program counter23:56
_franck_the arch spec says "The Program Counter registers represent the address just executed and the address23:56
_franck_instruction just to be executed."23:56

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