| -!- Netsplit *.net <-> *.split quits: esg, Blok, derRichard, unicos, jonibo, O01eg, rolloTomasi, gmarkall, giuseppe, juliusb_, (+2 more, use /NETSPLIT to show all of them) | 02:06 | |
| -!- Netsplit over, joins: O01eg, derRichard, jeremybennett, juliusb_, nollan, unicos, gmarkall, rolloTomasi, jonibo, giuseppe (+2 more) | 02:11 | |
| -!- Netsplit *.net <-> *.split quits: juliusb_, unicos, gmarkall, nollan, _franck_, jeremybennett, derRichard, jonibo, giuseppe, O01eg, (+3 more, use /NETSPLIT to show all of them) | 14:22 | |
| -!- Netsplit over, joins: _franck_, O01eg, derRichard, jeremybennett, juliusb_, nollan, unicos, gmarkall, rolloTomasi, jonibo (+3 more) | 14:28 | |
| juliusb_ | Hmm, this TCL expect stuff is not at all fun | 15:19 |
|---|---|---|
| juliusb_ | I really can't figure out how to do something very simple like check the return code of or1ksim | 15:19 |
| juliusb_ | and then TCL is just an abomonation anyway hehe | 15:21 |
| juliusb_ | and when this step of trying to hack some bloody test code takes up far more time than it should, you're inclined to just forget about it | 15:23 |
| _franck_ | juliusb_: ok, breakpoints works with openocd (don't what what happend....) | 17:04 |
| _franck_ | however, once it has stopped, if you clear the bp and continue or stepi is stay where the bp was (the cpu still stop here) | 17:05 |
| _franck_ | I think it is the same stall problem I had with my Tcl script...the cpu seems not to recover from a stall/unstall here | 17:13 |
| juliusb_ | mmm | 17:18 |
| juliusb_ | OK | 17:18 |
| _franck_ | that means it works for you, and I may have a bug somewhere ? :) | 17:19 |
| juliusb_ | ummm, i would check the caching of that instruction | 17:47 |
| juliusb_ | i think it worked for me | 17:47 |
| _franck_ | if you mean the substitution of the inscrution by the trap instruction | 19:16 |
| _franck_ | and the opposite, it works | 19:16 |
| juliusb_ | in the memory? but is the instruction cache being flushed? | 19:43 |
| _franck_ | don't know, you're right need to check | 20:11 |
| juliusb_ | it could be a useful thing to add to the debugger | 20:30 |
| juliusb_ | actually, to force block invalidate of that block the swapped instruction is in | 20:31 |
| _franck_ | I'll make a quick test without enabling instruction cache in the RTL config | 20:39 |
| _franck_ | disabling instruction cache doesn't change anything | 21:55 |
| _franck_ | if I set/remove my breakpoint it doesn't continue. It always break at the same address | 21:55 |
| _franck_ | however, if I set npc to 0x100 and continue, it starts again | 21:56 |
| juliusb_ | hmmm | 23:53 |
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